2839 Commits

Author SHA1 Message Date
Zalathar
89b6b0b6a4 coverage: Clarify that getting a PGO name also makes a function "used" 2025-07-27 21:49:46 +10:00
Zalathar
24e2b4832b coverage: Infer instances_used from pgo_func_name_var_map
In obscure circumstances, we would sometimes emit a covfun record for a
function with no physical coverage counters, causing `llvm-cov` to fail with
the cryptic error message:

    malformed instrumentation profile data: function name is empty

We can eliminate this mismatch by removing `instances_used` entirely, and
instead inferring its contents from the keys of `pgo_func_name_var_map`.

This makes it impossible for a "used" function to lack a PGO name entry.
2025-07-27 21:49:37 +10:00
Jacob Pratt
8aa3d41b85
Rollup merge of #144480 - Zalathar:revert-empty-span, r=Zalathar
Revert "coverage: Enlarge empty spans during MIR instrumentation, not codegen"

Surprisingly, rust-lang/rust#144298 alone (extracted from rust-lang/rust#140847) was enough to re-trigger the failures observed in https://github.com/rust-lang/rust/issues/141577#issuecomment-3120667286.

---

This reverts commit f877aa7d14916f71a2f88c6d4c009e7ded7684c4.

---

r? ghost
2025-07-26 22:42:39 -04:00
Jacob Pratt
2c395c7759
Rollup merge of #144383 - ZuseZ4:disable-f128-on-amdgcn, r=oli-obk
disable cfg.has_reliable_f128 on amdgcn

I was experimenting with compiling a few kernels for amd while working on std::offload. It seems like the logic in https://github.com/rust-lang/compiler-builtins/pull/737 got removed, so I re-introduce it here. Probably should have a test to avoid another regression and make sure that f128 doesn't show up as target feature for amdgcn. It looks like currently we neither check that for nvptx, nor amdgpu. Maybe I could add two revisions to https://github.com/rust-lang/rust/blob/master/tests/ui/float/target-has-reliable-nightly-float.rs?
r? ````@Flakebi````

fixes: https://github.com/rust-lang/rust/issues/144381
2025-07-26 22:42:34 -04:00
Jens Reidel
53018dc2bc
Disable has_reliable_f128_math on musl targets
musl does not implement the symbols required by std for f128 maths.
Disable the associated cfg for all musl targets and adjust the tests
accordingly.

Signed-off-by: Jens Reidel <adrian@travitia.xyz>
2025-07-26 07:01:55 +02:00
Zalathar
2b17897092 Revert "coverage: Enlarge empty spans during MIR instrumentation, not codegen"
This reverts commit f877aa7d14916f71a2f88c6d4c009e7ded7684c4.
2025-07-26 11:14:40 +10:00
bors
5d22242a3a Auto merge of #144062 - bjorn3:lto_refactors2, r=davidtwco
Various refactors to the LTO handling code (part 2)

Continuing from https://github.com/rust-lang/rust/pull/143388 this removes a bit of dead code and moves the LTO symbol export calculation from individual backends to cg_ssa.
2025-07-24 12:50:26 +00:00
Manuel Drehwald
732097ea61 disable cfg.has_reliable_f128 on amdgcn 2025-07-23 16:49:39 -07:00
Zalathar
f877aa7d14 coverage: Enlarge empty spans during MIR instrumentation, not codegen
This allows us to assume that coverage spans will only be discarded during
codegen in very unusual situations.
2025-07-22 19:49:54 +10:00
许杰友 Jieyou Xu (Joe)
5e3eb25125
Rollup merge of #142097 - ZuseZ4:offload-host1, r=oli-obk
gpu offload host code generation

r? ghost

This will generate most of the host side code to use llvm's offload feature.
The first PR will only handle automatic mem-transfers to and from the device.
So if a user calls a kernel, we will copy inputs back and forth, but we won't do the actual kernel launch.
Before merging, we will use LLVM's Info infrastructure to verify that the memcopies match what openmp offloa generates in C++. `LIBOMPTARGET_INFO=-1 ./my_rust_binary` should print that a memcpy to and later from the device is happening.

A follow-up PR will generate the actual device-side kernel which will then do computations on the GPU.
A third PR will implement manual host2device and device2host functionality, but the goal is to minimize cases where a user has to overwrite our default handling due to performance issues.

I'm trying to get a full MVP out first, so this just recognizes GPU functions based on magic names. The final frontend will obviously move this over to use proper macros, like I'm already doing it for the autodiff work.
This work will also be compatible with std::autodiff, so one can differentiate GPU kernels.

Tracking:
- https://github.com/rust-lang/rust/issues/131513
2025-07-22 00:54:24 +08:00
bjorn3
dadc4cae50 Remove each_linked_rlib_for_lto from CodegenContext 2025-07-21 07:58:44 +00:00
bjorn3
1a6f941d2b Move exported_symbols_for_lto out of CodegenContext 2025-07-21 07:58:44 +00:00
bjorn3
6e757354ad Merge exported_symbols computation into exported_symbols_for_lto
And move exported_symbols_for_lto call from backends to cg_ssa.
2025-07-21 07:58:44 +00:00
bjorn3
1c8dc6f440 Move LTO symbol export calculation from backends to cg_ssa 2025-07-21 07:58:44 +00:00
bjorn3
112799e637 Merge modules and cached_modules for fat LTO
The modules vec can already contain serialized modules and there is no
need to distinguish between cached and non-cached cgus at LTO time.
2025-07-21 07:58:44 +00:00
Matthias Krüger
d24684ef4f
Rollup merge of #144116 - nikic:llvm-21-fixes, r=dianqk
Fixes for LLVM 21

This fixes compatibility issues with LLVM 21 without performing the actual upgrade. Split out from https://github.com/rust-lang/rust/pull/143684.

This fixes three issues:
 * Updates the AMDGPU data layout for address space 8.
 * Makes emit-arity-indicator.rs a no_core test, so it doesn't fail on non-x86 hosts.
 * Explicitly sets the exception model for wasm, as this is no longer implied by `-wasm-enable-eh`.
2025-07-20 08:56:08 +02:00
Manuel Drehwald
4a1a5a4295 gpu host code generation 2025-07-18 16:30:42 -07:00
Manuel Drehwald
5958ebe829 add various wrappers for gpu code generation 2025-07-18 16:24:12 -07:00
Manuel Drehwald
634016478e add -Zoffload=Enable flag behind -Zunstable-options, to enable gpu (host) code generation 2025-07-18 16:24:00 -07:00
Manuel Drehwald
42d6b0d8bc make more builder functions generic 2025-07-18 16:23:54 -07:00
Nikita Popov
12b19be741 Pass wasm exception model to TargetOptions
This is no longer implied by -wasm-enable-eh.
2025-07-18 09:35:50 +02:00
Nikita Popov
63e1074c97 Update AMDGPU data layout 2025-07-18 09:35:11 +02:00
Matthias Krüger
accf61dd42
Rollup merge of #143293 - folkertdev:naked-function-kcfi, r=compiler-errors
fix `-Zsanitizer=kcfi` on `#[naked]` functions

fixes https://github.com/rust-lang/rust/issues/143266

With `-Zsanitizer=kcfi`, indirect calls happen via generated intermediate shim that forwards the call. The generated shim preserves the attributes of the original, including `#[unsafe(naked)]`. The shim is not a naked function though, and violates its invariants (like having a body that consists of a single `naked_asm!` call).

My fix here is to match on the `InstanceKind`, and only use `codegen_naked_asm` when the instance is not a `ReifyShim`. That does beg the question whether there are other `InstanceKind`s that could come up. As far as I can tell the answer is no: calling via `dyn` seems to work find, and `#[track_caller]` is disallowed in combination with `#[naked]`.

r? codegen
````@rustbot```` label +A-naked
cc ````@maurer```` ````@rcvalle````
2025-07-18 04:27:51 +02:00
León Orell Valerian Liehr
be5f8f299d
Rollup merge of #143388 - bjorn3:lto_refactors, r=compiler-errors
Various refactors to the LTO handling code

In particular reducing the sharing of code paths between fat and thin-LTO and making the fat LTO implementation more self-contained. This also moves some autodiff handling out of cg_ssa into cg_llvm given that Enzyme only works with LLVM anyway and an implementation for another backend may do things entirely differently. This will also make it a bit easier to split LTO handling out of the coordinator thread main loop into a separate loop, which should reduce the complexity of the coordinator thread.
2025-07-17 03:58:28 +02:00
Folkert de Vries
9c8ab89187
use codegen_instance_attrs where an instance is (easily) available 2025-07-16 23:24:32 +02:00
Samuel Tardieu
b564ecf04b
Rollup merge of #143920 - oli-obk:cg-llvm-safety, r=jieyouxu
Make more of codegen_llvm safe

Best reviewed commit-by-commit.
2025-07-16 17:06:40 +02:00
Samuel Tardieu
bbda0c9fb5
Rollup merge of #143855 - JonathanBrouwer:omit_gdb_pretty_printer_section, r=jdonszelmann
Port `#[omit_gdb_pretty_printer_section]` to the new attribute parsing

Ports `#[omit_gdb_pretty_printer_section]` to the new attribute parsing infrastructure for https://github.com/rust-lang/rust/issues/131229#issuecomment-2971351163

r? ```@jdonszelmann```
2025-07-14 18:05:45 +02:00
Oli Scherer
7f95f04267 Eliminate all direct uses of LLVMMDStringInContext2 2025-07-14 08:27:08 +00:00
Oli Scherer
56d22cd29f Use context methods instead of directly calling FFI 2025-07-14 08:27:08 +00:00
Oli Scherer
b9baf63f99 Merge typeid_metadata and create_metadata 2025-07-14 08:27:08 +00:00
Oli Scherer
e574fef728 Shrink some unsafe blocks in cg_llvm 2025-07-14 08:27:08 +00:00
Oli Scherer
d3d51b4fdb Avoid a bunch of unnecessary unsafe blocks in cg_llvm 2025-07-14 08:27:08 +00:00
Matthias Krüger
b4b00c7d10
Rollup merge of #143785 - bjorn3:faster_ra_build_script_build, r=Kobzol
Add --compile-time-deps argument for x check

Together with skipping building C++ code in rustc_llvm for check, this reduces the amount of time it takes to do the x check for rust-analyzer analysis from 12m16s to 3m06s when the bootstrap compiler is already downloaded.
2025-07-13 15:16:00 +02:00
Jonathan Brouwer
86349e31dd
Port #[omit_gdb_pretty_printer_section] to the new attribute parsing infrastructure
Signed-off-by: Jonathan Brouwer <jonathantbrouwer@gmail.com>
2025-07-12 22:55:48 +02:00
Matthias Krüger
7f3204f34d
Rollup merge of #143633 - dillona:noinline-assert, r=fee1-dead
fix: correct assertion to check for 'noinline' attribute presence before removal
2025-07-11 19:45:23 +02:00
bjorn3
87958ad683 Avoid building C++ for rustc_llvm with --compile-time-deps
This saves about 30s.
2025-07-11 13:32:03 +00:00
bors
855e0fe46e Auto merge of #142911 - mejrs:unsized, r=compiler-errors
Remove support for dynamic allocas

Followup to rust-lang/rust#141811
2025-07-11 05:27:32 +00:00
Trevor Gross
6e3d017b2f
Rollup merge of #143722 - oli-obk:sound-llvm, r=dianqk
Make some "safe" llvm ops actually sound

Noticed while doing other refactorings

it may cause some extra unnecessary allocations, but the current use sites are rare ones anyway
2025-07-10 20:20:39 -04:00
Matthias Krüger
95cbacd019
Rollup merge of #143632 - dillona:ffi-param-names, r=jieyouxu
fix: correct parameter names in LLVMRustBuildMinNum and LLVMRustBuildMaxNum FFI declarations
2025-07-10 20:28:48 +02:00
Matthias Krüger
9e6af56e12
Rollup merge of #143599 - folkertdev:x86-asm-syntax-global-naked-asm, r=Amanieu
emit `.att_syntax` when global/naked asm use that option

fixes https://github.com/rust-lang/rust/issues/143542

LLVM would error when using `-Cllvm-args=-x86-asm-syntax=intel` in combination with global/naked assembly with `att_syntax`. It turns out that for LLVM you do in this case need to emit `.att_syntax`.

r? `@Amanieu`
2025-07-10 20:28:47 +02:00
Oli Scherer
84eeca2e2f Make some "safe" llvm ops actually sound 2025-07-10 07:27:41 +00:00
Oli Scherer
486ffda9dc Add opaque TypeId handles for CTFE 2025-07-09 16:37:11 +00:00
Folkert de Vries
6fc5d4edda
emit .att_syntax when global/naked asm use that option 2025-07-09 01:09:55 +02:00
Dillon Amburgey
b2299e20b2 fix: correct assertion to check for 'noinline' attribute presence before removal 2025-07-08 06:24:50 -05:00
Dillon Amburgey
0455577974 fix: correct parameter names in LLVMRustBuildMinNum and LLVMRustBuildMaxNum FFI declarations 2025-07-08 06:24:19 -05:00
mejrs
49421d1fa3 Remove support for dynamic allocas 2025-07-07 23:04:06 +02:00
bors
a2d45f73c7 Auto merge of #143601 - matthiaskrgr:rollup-9iw2sqk, r=matthiaskrgr
Rollup of 9 pull requests

Successful merges:

 - rust-lang/rust#132469 (Do not suggest borrow that is already there in fully-qualified call)
 - rust-lang/rust#143340 (awhile -> a while where appropriate)
 - rust-lang/rust#143438 (Fix the link in `rustdoc.md`)
 - rust-lang/rust#143539 (Regression tests for repr ICEs)
 - rust-lang/rust#143566 (Fix `x86_64-unknown-netbsd` platform support page)
 - rust-lang/rust#143572 (Remove unused allow attrs)
 - rust-lang/rust#143583 (`loop_match`: fix 'no terminator on block')
 - rust-lang/rust#143584 (make `Machine::load_mir` infallible)
 - rust-lang/rust#143591 (Fix missing words in future tracking issue)

r? `@ghost`
`@rustbot` modify labels: rollup
2025-07-07 20:30:53 +00:00
Matthias Krüger
7ed6bd98a2
Rollup merge of #143572 - yotamofek:pr/unused-allow-attrs, r=fee1-dead
Remove unused allow attrs

These `#[allow]`s seem to be unused (at least according to `x check`, didn't run `x test` locally). Let's clean them up! 🧹
2025-07-07 19:55:35 +02:00
bors
2f8eeb2bba Auto merge of #143182 - xdoardo:more-addrspace, r=workingjubilee
Allow custom default address spaces and parse `p-` specifications in the datalayout string

Some targets, such as CHERI, use as default an address space different from the "normal" default address space `0` (in the case of CHERI, [200 is used](https://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-877.pdf)). Currently, `rustc` does not allow to specify custom address spaces and does not take into consideration [`p-` specifications in the datalayout string](https://llvm.org/docs/LangRef.html#langref-datalayout).

This patch tries to mitigate these problems by allowing targets to define a custom default address space (while keeping the default value to address space `0`) and adding the code to parse the `p-` specifications in `rustc_abi`. The main changes are that `TargetDataLayout` now uses functions to refer to pointer-related informations, instead of having specific fields for the size and alignment of pointers in the default address space; furthermore, the two `pointer_size` and `pointer_align` fields in `TargetDataLayout` are replaced with an `FxHashMap` that holds info for all the possible address spaces, as parsed by the `p-` specifications.

The potential performance drawbacks of not having ad-hoc fields for the default address space will be tested in this PR's CI run.

r? workingjubilee
2025-07-07 17:28:14 +00:00
Yotam Ofek
3b48407f93 Remove unused allow attrs 2025-07-07 12:58:16 +00:00