688 Commits

Author SHA1 Message Date
Palladium
bdfd56734d
Adding documentation links for arm crc32 intrinsics (#1316) 2022-08-09 20:56:09 +01:00
tmiasko
c7eadc8f06
Remove restrictions on compare-exchange memory ordering. (#1315) 2022-07-18 11:51:36 +01:00
Usamoi
1154adb436
Fix a typo in the document. (#1314) 2022-07-17 13:58:10 +01:00
tmiasko
b186197c7c
Update atomic intrinsics (#1313) 2022-07-02 00:53:50 +01:00
Thom Chiovoloni
3845dea2a6
Ensure the neon vector aggregates like float32x4x4_t are #[repr(C)] (#1309) 2022-06-13 14:40:01 +01:00
Urgau
e4d28b2c5c
Remove useless conditional compilation (#1308) 2022-06-10 00:14:17 +01:00
Simon Schubert
a390bd340b
Fix ARM vbsl* NEON intrinsics (#1191) (#1307) 2022-05-16 22:44:28 +01:00
est31
6a28c9ca8b Allow unused macro arms for simd_shuffle16 too 2022-05-10 19:15:00 +02:00
est31
cf471eb26e
Allow unused macro rules for two macros (#1305) 2022-05-10 00:48:31 +01:00
Sam Parker
f6cf8d45b0
Wasm simd128 pairwise/lane-wise (#1302) 2022-04-29 14:11:39 +01:00
Matan Hamilis
f4d6903728
Typo in _mm_xor_pd description (#1304) 2022-04-29 01:30:11 +01:00
Jamie Cunliffe
e75d75e292
Add the rdm target feature to the sqrdmlsh intrinsic. (#1285) 2022-04-08 19:29:11 +01:00
Jacob Pratt
64f4469b23 Remove use of #[rustc_deprecated] 2022-04-08 14:04:36 +02:00
Ben Kimock
f2bfba1a11 Remove feature gates for stabilized features 2022-03-28 08:20:15 +02:00
Ben Kimock
945ccb4c3f Change remaining _undefined_ functions to zero-init 2022-03-28 08:20:15 +02:00
Alex Touchet
626654b486
Use SPDX license format and update packed_simd crate link (#1297) 2022-03-17 10:55:51 +00:00
relrelb
528c020edf
Fix broken links (#1294) 2022-03-16 14:51:45 +00:00
Guillaume Gomez
b51baab99c
Replace unused doc comment with code comment (#1286) 2022-03-02 17:24:38 +00:00
Amanieu d'Antras
b25548658a Updates for LLVM 14 on nightly 2022-02-19 20:44:04 +00:00
Amanieu d'Antras
831dd7190d Stabilize vget_low_s8 on AArch64
This was missed  when most of the AArch64 intrinsics were stabilized.
2022-02-19 20:44:04 +00:00
minybot
3f075854cc
Add AVX512F expandloadu (#1280) 2022-02-08 15:09:09 +00:00
minybot
6679b4a6d4
Complete avx512vbmi2 (#1279) 2022-02-06 13:27:31 +00:00
Luo Jia
0888677e5c
riscv: K extension (part 1), floating-point control and state register (#1278) 2022-02-06 13:23:25 +00:00
Amanieu d'Antras
fe97d9771b
Change core_arch_docs.md so it works from both std and core (#1277) 2022-01-28 12:45:05 +00:00
Jörn Horstmann
929f6e8409
Implement avx512 compressstore intrinsics (#1273) 2022-01-24 23:02:06 +00:00
post-rex
7c81ce0606 fixed documentation crc32 -> crc32-c (with x86(_64)) 2022-01-24 22:32:19 +00:00
Luo Jia
ab48bdfb46
More RISC-V instructions in core::arch (#1271) 2022-01-05 06:17:58 +00:00
Amanieu d'Antras
59e7156f6e
Remove asm feature which is now stable (#1269) 2021-12-19 14:43:19 +00:00
Frank Steffahn
df24e2a0f8 Fix a bunch of typos 2021-12-14 10:17:43 -08:00
Sparrow Li
88e98e9c60
Stabilize armv8 neon instruction set on aarch64 (#1266) 2021-12-13 01:52:20 +00:00
Amanieu d'Antras
39849dd6c6
Import the asm! macro from core::arch (#1265) 2021-12-09 23:50:37 +00:00
Luo Jia
935d5297e3
Fix avx512f build on x86-32; fix avx512gfni test fail (#1264) 2021-12-09 12:30:22 +00:00
Luo Jia
3d0bdfeeb1
Add RISC-V platform and PAUSE instruction (#1262) 2021-12-05 02:57:53 +00:00
Eric Huss
0256736d2f
Fix _mm_extract_ps example. (#1261) 2021-12-04 13:04:09 +00:00
Jörn Horstmann
54d690dc70
Implement avx512 masked load and store intrinsics (#1254) 2021-12-04 13:03:40 +00:00
Amanieu d'Antras
937978eeef
Update the intrinsic checker tool (#1258) 2021-12-04 13:03:30 +00:00
Amanieu d'Antras
ca1f7cc1a6
Add missing vtst_p16 and vtstq_p16 intrinsics (#1257) 2021-11-20 20:51:37 +00:00
Sparrow Li
7c3bd04537
complete armv8 instructions (#1256) 2021-11-19 01:24:36 +00:00
Eric Huss
1e2dcdcbd4
Fix i8mm feature with bootstrap compiler. (#1252) 2021-11-15 03:12:25 +00:00
Eric Huss
a7d3ae0d6b
Fix unused link_name attribute. (#1251) 2021-11-13 19:20:11 +00:00
Sparrow Li
be5e1be224
Add remaining insturctions (#1250)
* add vmmla vusmmla vsm4e vsm3 vrax1 vxar vsha512 vbcax veor3 neon instructions

* update runtime feature detect

* correct tests

* add `vrnd32x` `vrnd64x`

* add MISSING.md
2021-11-10 15:19:59 +00:00
senevoldsen
46d0e8d519
Remove that _mm256_set_epi8 sets in reversed order. (#1248) 2021-11-08 00:58:47 +00:00
Amanieu d'Antras
023a926d39
Make the wasm and wasm64 modules unstable (#1247) 2021-11-05 02:50:23 +00:00
Jamie Cunliffe
b04e740f24
Handle intrinsics with constraints in the test tool. (#1237) 2021-11-05 01:47:31 +00:00
Jamie Cunliffe
8d6f3f36b3
Correct the vqrdmlah intrinsics. (#1246) 2021-11-04 14:16:26 +00:00
Alex Crichton
157d273c5c
Fix parsing a doc block for _mm_extract_ps (#1242) 2021-11-01 23:00:59 +00:00
devsnek
d98a902f20
expose wasm intrinsics using target_family = "wasm" (#1241) 2021-10-31 18:12:24 +00:00
Alex Crichton
05aad76b58
Add a rudimentary wasm64 module with intrinsics (#1240) 2021-10-30 22:14:54 +01:00
Jamie Cunliffe
813530237d
Do not emit undefined lshr/ashr for Neon shifts (#1238) 2021-10-22 20:24:54 +01:00
Sparrow Li
9df48f1e57
Complete the remaining neon instructions (#1230) 2021-10-21 10:52:05 +01:00