180 Commits

Author SHA1 Message Date
Ralf Jung
cd59f3987e adjust to MaybeUninit renames 2019-03-29 10:33:23 +01:00
gnzlbg
523e2600ae _mm_pause does not require SSE2
Closes #705 .
2019-03-18 23:44:22 +01:00
Lokathor
b0771647a8 Revert the regression, add a GBA target to avoid this again 2019-03-18 08:57:03 +01:00
Lokathor
4c24f320f4 oh, they both need double quotes, okay 2019-03-18 08:57:03 +01:00
Lokathor
5450e5248f add the double quotes 2019-03-18 08:57:03 +01:00
Lokathor
76e730f3c7 Limit this to sufficiently advanced devices 2019-03-18 08:57:03 +01:00
Paolo Teti
42cb3a07e6 Fix target arm-linux-androideabi
Move int16x2_t and uint16x2_t into dsp.rs and export to simd32.rs.
2019-03-02 23:38:16 +01:00
Paolo Teti
999066b8e2 ACLE/DSP: implement remaining intrinsics
Adds:

__smulbb, __smulbt, __smultb, __smultt, __smulwb, __smulwt
__qdbl, __smlabb, __smlabt, __smlatb, __smlatt, __smlawb, __smlawt

and related test-cases
2019-03-02 23:38:16 +01:00
Paolo Teti
2d7479844a The GE bits of the APSR are set also by USUB8 2019-02-27 23:47:50 +01:00
Paolo Teti
86a62c6865 ACLE/SIMD32: add ssub8 and usub8
- add `ssub8` and `usub8`
- bump instruction limit to 29
2019-02-27 23:47:50 +01:00
myfreeweb
5238498dbd aarch64: escape square brackets in docs
To comply with deny(intra_doc_link_resolution_failure)
2019-02-27 19:44:15 +01:00
Denys Zariaiev
59dd15f603 Correctly import core::ffi::c_void 2019-02-27 19:43:56 +01:00
Denys Zariaiev
275fc42ad8 NVPTX syscalls 2019-02-27 19:43:56 +01:00
gnzlbg
f7fec1c4cc Always include ACLE when dox is defined 2019-02-24 11:30:40 +01:00
gnzlbg
c91584d241 Make core_arch compatible with Rust2015 and Rust2018 2019-02-23 01:14:07 +01:00
gnzlbg
a177055824 Test Rust2018 builds 2019-02-23 01:14:07 +01:00
Taiki Endo
61414fdd62 Change imports in std_detect to edition-agnostic style 2019-02-19 17:35:37 +01:00
Jorge Aparicio
b6dda84343 cargo fmt 2019-02-18 19:29:13 +01:00
Jorge Aparicio
c78520a8da assert_instr: bump instruction limit for simd32 2019-02-18 19:29:13 +01:00
Jorge Aparicio
ccba7aa7c9 acle/{dsp,simd32}: fix unit tests 2019-02-18 19:29:13 +01:00
Jorge Aparicio
c7bbc50568 acle/ex: CLREX requires v6k 2019-02-18 19:29:13 +01:00
Mateusz Mikuła
640eb3874e Update crates/core_arch/src/acle/simd32.rs
Co-Authored-By: japaric <jorge@japaric.io>
2019-02-18 19:29:13 +01:00
Jorge Aparicio
3957baad18 fix CI 2019-02-18 19:29:13 +01:00
Jorge Aparicio
4524877a54 acle/{dsp,simd32}: add leading underscores to match ACLE spec 2019-02-18 19:29:13 +01:00
Jorge Aparicio
8cf9e1f352 conditionally declare the dmb_dsb macro 2019-02-18 19:29:13 +01:00
Jorge Aparicio
9c541c2057 add missing imports 2019-02-18 19:29:13 +01:00
Jorge Aparicio
8b747beb20 cargo fmt 2019-02-18 19:29:13 +01:00
Jorge Aparicio
a1b20cee61 acle/ex: fix raw pointer mutability 2019-02-18 19:29:13 +01:00
Jorge Aparicio
b4593986a7 acle: move arm/dsp into acle/{dsp,simd32}
addresses https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r255312454
2019-02-18 19:29:13 +01:00
Jorge Aparicio
d10ba3f172 acle/hints: make sevl truly available on aarch64
addresses https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r256864336
2019-02-18 19:29:13 +01:00
Jorge Aparicio
3b254b2565 acle/docs: add armv8-m and armv8-r to the list of rustc targets & llvm features 2019-02-18 19:29:13 +01:00
Jorge Aparicio
32f6e2f8f7 acle: add ldrex, clrex and strex 2019-02-18 19:29:13 +01:00
Jorge Aparicio
a681e3b3f5 acle/dsp: note the difference between LLVM's +dsp and ACLE's __ARM_FEATURE_DSP
addresses https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r256597576
2019-02-18 19:29:13 +01:00
Jorge Aparicio
43cfda6670 acle/dsp: update comment
addresses https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r256556341
2019-02-18 19:29:13 +01:00
Jorge Aparicio
309f91b3e0 acle/barrier: remove cfg from re-export
addresses https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r256556043
2019-02-18 19:29:13 +01:00
Jorge Aparicio
ab2e19bc14 acle/hints: gate sevl on 'v8' rather than on 'aarch64'
addresses https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r256553546
2019-02-18 19:29:13 +01:00
Jorge Aparicio
5aee8541c7 acle: move saturating intrinsics into its own module
addresses https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r255312560
2019-02-18 19:29:13 +01:00
Jorge Aparicio
657e2a47a5 acle/{simd32,dsp}: not available on aarch64
addresses

https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r255312249

https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r255312264
2019-02-18 19:29:13 +01:00
Jorge Aparicio
627bcddb4f acle/barrier: use llvm.{arm,aarch64}.{dmb,dsb,isb} instead of asm!
also make these available on architectures that don't have a dedicated DMB / DSB
/ ISB instruction

addresses https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r255312214
2019-02-18 19:29:13 +01:00
Jorge Aparicio
240468f652 acle/dsp: make available on the A profile 2019-02-18 19:29:13 +01:00
Jorge Aparicio
6ea932d2fe acle/simd32: also expose on the A profile
addresses https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r255253933
2019-02-18 19:29:13 +01:00
Jorge Aparicio
95a146e285 acle/hints: most hints require 'v6' rather than 'v6k'
addresses https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r255251241
2019-02-18 19:29:13 +01:00
Jorge Aparicio
4008686ee1 acle/hints: use asm! for __nop
addresses https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r255250890
2019-02-18 19:29:13 +01:00
Jorge Aparicio
0bcc4a4f01 acle/hints: __dbg requires 'v7'
addresses https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r255250415
2019-02-18 19:29:13 +01:00
Jorge Aparicio
766fac9afa acle::hints: use llvm.{arm,aarch64.hint}
addresses https://github.com/rust-lang-nursery/stdsimd/pull/557#discussion_r255250217
2019-02-18 19:29:13 +01:00
Jorge Aparicio
13d35372ec add missing import 2019-02-18 19:29:13 +01:00
Jorge Aparicio
da524418fd fix relative import 2019-02-18 19:29:13 +01:00
Jorge Aparicio
36686280f7 remove cmsis module; add acle module
ACLE (ARM C Language Extensions) is more general (supports ARMv4 to ARMv8) than
CMSIS (ARMv7-M and ARMv7-R)
2019-02-18 19:29:13 +01:00
gnzlbg
1fb5f768a9 Bump versions of core_arch and std_detect 2019-02-18 17:49:32 +01:00
Alexander Regueiro
b322f1c03a A few cosmetic improvements. 2019-02-18 17:00:42 +01:00