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290 Commits

Author SHA1 Message Date
Nathan Wiebe Neufeldt
ced45f6eb3 Even more doc formatting core_arch/src/mips/msa.rs 2019-07-25 00:50:43 +02:00
Nathan Wiebe Neufeldt
7ac384096b More doc formatting in core_arch/src/mips/msa.rs 2019-07-25 00:50:43 +02:00
Nathan Wiebe Neufeldt
0010f5bb4b Fix typos in core_arch documentation 2019-07-25 00:50:43 +02:00
Jonas Schievink
03f389ff6d Adjust #[doc(include)] paths for rustdoc change 2019-07-23 17:14:01 +02:00
bjorn3
a035568e7d Remove unnecessary \n from cpuid 2019-07-23 16:47:27 +02:00
gnzlbg
e4d54a44bf Revert PR 769 2019-07-15 16:28:24 +02:00
Johannes Maibaum
2f2f78ada1 Add ARM Neon vmnv_p8/vmvnq_p8 bw not intrinsics 2019-07-15 09:22:17 +02:00
Johannes Maibaum
c55edc23b4 Add ARM Neon vmvn_*/vmvnq_* bitwise not intrinsics 2019-07-15 09:22:17 +02:00
gnzlbg
0357faa7c0 Try harder to parse invalid UTF8 on Windows 2019-07-14 15:29:19 +02:00
gnzlbg
f61cb90d87 Try windows 2019-07-14 15:29:19 +02:00
Luca Barbato
b39c3262f1 Rustfmt altivec.rs 2019-07-11 14:39:54 +02:00
Luca Barbato
89cb7025cb Add imm5 and imm_s5 to the common macros 2019-07-11 14:39:54 +02:00
Luca Barbato
eef9e33e6a Add Altivec vec_ld 2019-07-11 14:39:54 +02:00
Luca Barbato
6f9061f78b Add Altivec vec_floor 2019-07-11 14:39:54 +02:00
Luca Barbato
1f96c3192e Add a fuzzy comparison test for f32 2019-07-11 14:39:54 +02:00
Luca Barbato
cce9d50f9b Add Altivec vec_abs for f32 2019-07-11 14:39:54 +02:00
Luca Barbato
2339c48706 Add Altivec vec_expte 2019-07-11 14:39:54 +02:00
Luca Barbato
3525b9d7a3 Add Altivec vec_sub for f32 as well 2019-07-11 14:39:54 +02:00
Luca Barbato
2c1e3fdb37 Add single argument test macro 2019-07-11 14:39:54 +02:00
Luca Barbato
0b3ff21135 Add Altivec vec_cmple and vec_cmplt 2019-07-11 14:39:54 +02:00
gnzlbg
8cec101751 Allow unused items in verification tests 2019-07-09 01:37:07 +02:00
gnzlbg
686b813f5d Update repo name 2019-07-09 01:37:07 +02:00
gnzlbg
127f13f10f Fix assert_instr tests 2019-07-08 22:58:19 +02:00
Yuki Okushi
e3ed80dd67 Fix typo 2019-07-08 22:54:13 +02:00
gnzlbg
832259621c Fix data-race in assert_instr 2019-07-08 13:15:07 +02:00
gnzlbg
657f778871 Fix libcore build 2019-07-08 13:15:07 +02:00
Yuki Okushi
6163c1d6ff Fix typo 2019-07-07 09:17:15 +02:00
Jonas Schievink
a0fb95df37 Adjust #[doc(include)] paths for rustdoc change 2019-06-23 20:15:34 +02:00
Sergey Pepyakin
1176e480a0 Stabilize unreachable. 2019-06-04 09:09:03 +02:00
hygonsoc
6369621e79 add Hygon Dhyana CPU Vendor ID("HygonGenuine") checking 
As Hygon Dhyana originates from AMD technology and shares most of the architecture with
AMD's family 17h, but with different CPU Vendor ID("HygonGenuine")/Family series number(Family 18h).

for CPUID feature bits, Hygon Dhyana(family 18h) share the same definition with AMD family 17h.
AMD CPUID specification is https://www.amd.com/system/files/TechDocs/25481.pdf.

Related Hygon kernel patch can be found on
http://lkml.kernel.org/r/5ce86123a7b9dad925ac583d88d2f921040e859b.1538583282.git.puwen@hygon.cn
 2019-05-25 15:51:21 +02:00
Tobias Kortkamp
491b7c0c53 Fix build of auxvec.rs on FreeBSD/powerpc64 
```
error[E0432]: unresolved import `mem`
  --> src/libstd/../stdsimd/crates/std_detect/src/detect/os/freebsd/auxvec.rs:45:9
   |
45 |     use mem;
   |         ^^^ no `mem` external crate

error: aborting due to previous error

For more information about this error, try `rustc --explain E0432`.
error: Could not compile `std`.
```
Tested by @pkubaj in https://reviews.freebsd.org/D20332
 2019-05-23 09:51:39 +02:00
Luca Barbato
f865daec9c Add Altivec vec_cmpgt 2019-05-22 17:24:07 +02:00
Luca Barbato
b06298ea1e Add Altivec vec_cmpge 2019-05-22 17:24:07 +02:00
Luca Barbato
e73f3e1257 Add Altivec vec_cmpeq 2019-05-22 17:24:07 +02:00
Luca Barbato
5329b456ef Add Altivec vec_cmpb 2019-05-22 17:24:07 +02:00
Luca Barbato
505680506b Add Altivec vec_ceil 2019-05-22 17:24:07 +02:00
Luca Barbato
b85253bb03 Add Altivec vec_avg 2019-05-22 17:24:07 +02:00
Luca Barbato
16218b48c7 Add Altivec vec_andc 2019-05-22 17:24:07 +02:00
Luca Barbato
dd87ee75a6 Add Altivec vec_and 2019-05-22 17:24:07 +02:00
Luca Barbato
b4bfdde689 Add Altivec vec_adds 2019-05-22 17:24:07 +02:00
Luca Barbato
12ff9fea16 Add Altivec vec_addc 2019-05-22 17:24:07 +02:00
Luca Barbato
06f87317ba Drop maybe_uninit 2019-05-22 17:23:57 +02:00
Luca Barbato
48b2712b8b Add Altivec vec_abss 2019-05-13 15:42:36 +02:00
Luca Barbato
b1dc55097a Add Altivec vec_subs 2019-05-13 15:42:36 +02:00
Luca Barbato
07e59fe404 Add Altivec vec_abs 2019-05-13 15:42:36 +02:00
Luca Barbato
2d67e40fa8 Add Altivec vec_splats 2019-05-13 15:42:36 +02:00
Luca Barbato
04801d1a48 Always inline splat and extract 
Otherwise the compiler would not inline them and produce instead a
pointless call.
 2019-05-13 15:42:36 +02:00
Luca Barbato
dd72b93489 Rustfmt 2019-05-13 15:42:36 +02:00
Luca Barbato
912eed1652 Add Altivec vec_sub 2019-05-13 15:42:36 +02:00
Luca Barbato
5ff4402e24 Reduce the boilerplate further 2019-05-13 15:42:36 +02:00