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1090 Commits

Author SHA1 Message Date
Sayantan Chakraborty
d6f40ec495 Fixes the shrd bug 2024-09-22 07:33:16 -04:00
Ralf Jung
4eed3c8a23 simd_extract, simd_insert: use absolute path in macro 2024-08-28 14:55:57 +01:00
Ralf Jung
7ccb13c178 simd_shuffle: pass the idx argument as a vector 2024-08-28 11:28:07 +01:00
dheaton-arm
03f144596f Fix test verification and allow for generic types in intrinsics 2024-08-27 15:14:28 +01:00
dheaton-arm
92b6a3abae Add MTE intrinsics 
Adds intrinsic functions to `core_arch::aarch64` for MTE, as per the
ACLE:
- __arm_mte_create_random_tag
- __arm_mte_increment_tag
- __arm_mte_exclude_tag
- __arm_mte_set_tag
- __arm_mte_get_tag
- __arm_mte_ptrdiff

These are unavailable without the `mte` target feature.
 2024-08-27 15:14:28 +01:00
James Barford-Evans
4f6820bd1b fix rebase, remove the const_vector attribure 
formatting

remove comma

put back square brackets
 2024-08-21 01:18:59 +01:00
George Wort
2caf80145b Use #[rustc_intrinsic_const_vector_arg] for Neon intrinsics 
This allows the constant vector to be passed directly
to LLVM which fixes a few issues where the LLVM intrinsic
expects a constant vector.
 2024-08-21 01:18:59 +01:00
Kjetil Kjeka
869ddbeb66 NVPTX: Add f16 SIMD intrinsics 2024-08-19 20:16:10 +01:00
Eduardo Sánchez Muñoz
f23656fbb6 Avoid legacy numeric constants 2024-08-19 17:01:20 +01:00
Eduardo Sánchez Muñoz
c103c015a8 Add loongarch64-unknown-linux-gnu to CI 2024-08-19 16:38:59 +01:00
Eduardo Sánchez Muñoz
76d71ff37e Use full path to refer simd_shuffle intrinsic from simd_shuffle! macro 
Avoids needing to import `crate::intrinsics::simd::simd_shuffle` in each file where `simd_shuffle!` is used and fixes loongarch64
 2024-08-17 18:07:04 +01:00
Eduardo Sánchez Muñoz
d9f0480fae Remove #![feature(asm_const)] 2024-08-17 18:07:04 +01:00
Luca Versari
87567faed1 Clarify the layout documentation for x86 SIMD types. 2024-08-16 14:33:04 +01:00
Luca Versari
d54fe45ffb Document the layout of x86 SIMD types. 2024-08-14 14:57:25 +01:00
Scott McMurray
4f02e2f8a9 Keep Debug the same 
This ended up way more annoying than expected, because I needed to refactor the `types!` macro to separate out the stability attributes to put those on the `Debug` impl without also copying all the `#[doc]`s.  But I like how it came out in the end, reducing duplication in the macro invocations.

But without it all the C-consistency tests fail.
 2024-08-08 23:47:25 +01:00
Scott McMurray
1bf1eff5cc Move entirely to array-based SIMD 
See MCP#621

This tries to make as few changes as possible -- it keeps the `new` functions taking all the parameters, for example.
 2024-08-08 23:47:25 +01:00
Sayantan Chakraborty
0c304072bc Remove the dummy function 2024-08-04 12:10:17 +01:00
Sayantan Chakraborty
200905e0e9 Fix _mm_stream_si64 2024-08-03 22:58:47 +01:00
Jonas Fierlings
47068b1a06 Fix markdown list in docs 2024-08-03 19:24:37 +01:00
ziyizhang-1
50cd4ef0c5 initial commit to enable amx 
AMX Intrinsics:

amx-tile:
  - _tile_loadconfig
  - _tile_storeconfig
  - _tile_loadd
  - _tile_release
  - _tile_stored
  - _tile_stream_loadd
  - _tile_zero
amx-int8:
  - _tile_dpbssd
  - _tile_dpbsud
  - _tile_dpbusd
  - _tile_dpbuud
amx-bf16:
  - _tile_dpbf16ps
amx-fp16
  - _tile_dpfp16ps
amx-complex
  - _tile_cmmimfp16ps
  - _tile_cmmrlfp16ps
 2024-08-03 19:02:09 +01:00
sayantn
4a13560ede Update Intrinsics List to v3.6.9 
Add `#[inline]` to avx512ifma intrinsics
Fix the test equality.
Remove the stability attributes in simd types and test functions
 2024-07-26 12:20:06 +01:00
sayantn
3cf2b7d74f AVX512FP16 Part 9: Remaining avx512fp16 and avxneconvert 2024-07-26 12:20:06 +01:00
sayantn
318e9ec7e7 AVX512FP16 Part 8: Convert from f16 2024-07-26 12:20:06 +01:00
sayantn
cea6530177 AVX512FP16 Part 7: Convert to f16 2024-07-26 12:20:06 +01:00
sayantn
734355993e AVX512FP16 Part 6: Remaining 
`cmpph`, `fpclass`, reduce, `blend`, `permutex`
 2024-07-26 12:20:06 +01:00
sayantn
debe317dcf AVX512FP16 Part 5: FP-Support 
`getexp`, `getmant`, `roundscale`, `scalef`, `reduce`
 2024-07-26 12:20:06 +01:00
sayantn
c024ef206f AVX512FP16 Part 4: Math functions 
Reciprocal, RSqrt, Sqrt, Max, Min
 2024-07-26 12:20:06 +01:00
sayantn
b88dfd6c03 AVX512FP16 Part 3: FMA 2024-07-26 12:20:06 +01:00
sayantn
7be9f610e3 AVX512_FP16 Part 2: Complex Multiplication 2024-07-26 12:20:06 +01:00
sayantn
60dfe5f264 AVX512FP16 Part 1 
Add-Sub-Mul-Div, Load-Store-Move, `comi`, `set`
 2024-07-26 12:20:06 +01:00
sayantn
c878b773d5 AVX512FP16 Part 0: Types 2024-07-26 12:20:06 +01:00
daxpedda
a1ad6bf8be Move Wasm's relaxed SIMD to Rust v1.82 2024-07-25 16:38:08 +01:00
sayantn
74f53212a0 Stabilize simd_x86_updates 2024-07-25 16:07:35 +01:00
sayantn
aa84427fd4 Use LLVM intrinsics for masked load/stores, expand-loads and fp-class 
Also, remove some redundant sse target-features from avx intrinsics
 2024-07-14 20:26:09 +01:00
daxpedda
ba9e8be05e Revert "wasm32: Add simd128 to enabled features for relaxed intrinsics" 2024-07-14 12:00:23 +02:00
sayantn
aa001c3f3e Some small refactorings 
Use llvm intrinsics for `vfpclassss` and `vfpclasssd`
Use `simd_insert` for `x86_polyfill`
 2024-07-12 18:12:30 +02:00
Alex Crichton
bb2b4293b9 wasm32: Add simd128 to enabled features for relaxed intrinsics 
It looks like LLVM requires that `simd128` is active to use these
intrinsics and `relaxed-simd` isn't implicitly enabling them. This is
probably something to fix at the LLVM layer as well but for now enable
both the `simd128` feature as well as the `relaxed-simd` feature to fix
things on our side.
 2024-07-11 17:26:52 +02:00
sayantn
1e8a22c374 Fix Documentation 2024-07-08 00:32:43 +02:00
sayantn
1da646fcab Implement missing in SSE4a and TBM 
Add `extracti`, `inserti` and `bextri` intrinsics. Refactor TBM into 2 modules
 2024-07-07 19:55:04 +02:00
Tobias Decking
7378b35fd0 Use generic simd in wasm intrinsics 2024-07-07 19:21:10 +02:00
Tobias Decking
bbb2ba5424 Refactor avx512bw: reduction operations 2024-07-06 12:07:29 +02:00
Tobias Decking
fe0a378499 Refactor avx512bw: mask operations 2024-07-06 12:07:29 +02:00
Tobias Decking
198a91e5db Refactor avx512bw: integer comparison 2024-07-06 12:07:29 +02:00
Tobias Decking
f1a1ec2921 Refactor avx512bw: max/min 2024-07-06 12:07:29 +02:00
Tobias Decking
9ad2a62245 Refactor avx512bw: saturating arithmetic 2024-07-06 12:07:29 +02:00
Tobias Decking
13063410dd Refactor avx512bw: avg + mulhi + abs 2024-07-06 12:07:29 +02:00
sayantn
268ac7fe92 Add detection for SHA512, SM3 and SM4 
Cannot cross-verify with `cupid` because they do not have these features yet.
 2024-07-06 11:29:28 +02:00
sayantn
c862e4e487 Added a bf16 type 2024-07-06 11:00:34 +02:00
sayantn
70fbc2e97c Implemented some missing functions 
These cannot be linked with LLVM because of the lack of `bfloat16` and `i1` types in Rust. So, inline asm was the only way
 2024-07-06 11:00:34 +02:00
sayantn
3de8e86491 Implemented the missing AVX512BF16 intrinsics 2024-07-06 11:00:34 +02:00