84 Commits

Author SHA1 Message Date
gnzlbg
56d9a42a2f add tests for endian-dependent behavior (#394)
* add tests for endian-dependent behavior

* format
2018-03-22 11:09:01 -05:00
gnzlbg
ff53ec6cb2 add arm neon vector types (#384) 2018-03-20 09:11:50 -05:00
Alex Crichton
cb4a957efd
Add initial wasm memory grow/current intrinsics (#361)
This exposes access to the `grow_memory` and `current_memory` instructions
provided by wasm in what will hopefully be a stable interface (the stable part
being x86 first in theory).
2018-03-09 09:21:08 -06:00
Alex Crichton
56af498e9e
Rename is_target_feature_detected! (#346)
This commit renames the `is_target_feature_detected!` macro to have different
names depending on the platform. For example:

* `is_x86_feature_detected!`
* `is_arm_feature_detected!`
* `is_aarch64_feature_detected!`
* `is_powerpc64_feature_detected!`

Each macro already has a platform-specific albeit similar interface. Currently,
though, each macro takes a different set of strings so the hope is that like
with the name of the architecture in the module we can signal the dangers of
using the macro in a platform-agnostic context.

One liberty taken with the macro currently though is to on both the x86 and
x86_64 architectures name the macro `is_x86_feature_detected` rather than also
having an `is_x86_64_feature_detected`. This mirrors, however, how all the
intrinsics are named the same on x86/x86_64.
2018-03-07 09:46:16 -06:00
gnzlbg
548290b801 Prepare portable packed vector types for RFCs (#338)
* Prepare portable packed SIMD vector types for RFCs

This commit cleans up the implementation of the Portable Packed Vector Types
(PPTV), adds some new features, and makes some breaking changes.

The implementation is moved to `coresimd/src/ppvt` (they are
still exposed via `coresimd::simd`).

As before, the vector types of a certain width are implemented in the `v{width}`
submodules. The `macros.rs` file has been rewritten as an `api` module that
exposes the macros to implement each API.

It should now hopefully be really clear where each API is implemented, and which types
implement these APIs. It should also now be really clear which APIs are tested and how.

- boolean vectors of the form `b{element_size}x{number_of_lanes}`.
- reductions: arithmetic, bitwise, min/max, and boolean - only the facade,
  and a naive working implementation. These need to be implemented
  as `llvm.experimental.vector.reduction.{...}` but this needs rustc support first.
- FromBits trait analogous to `{f32,f64}::from_bits` that perform "safe" transmutes.
  Instead of writing `From::from`/`x.into()` (see below for breaking changes) now you write
  `FromBits::from_bits`/`x.into_bits()`.
- portable vector types implement `Default` and `Hash`
- tests for all portable vector types and all portable operations (~2000 new tests).
- (hopefully) comprehensive implementation of bitwise transmutes and lane-wise
  casts (before `From` and the `.as_...` methods where implemented "when they were needed".
- documentation for PPTV (not great yet, but better than nothing)
- conversions/transmutes from/to x86 architecture specific vector types

- `store/load` API has been replaced with `{store,load}_{aligned,unaligned}`
- `eq,ne,lt,le,gt,ge` APIs now return boolean vectors
- The `.as_{...}` methods have been removed. Lane-wise casts are now performed by `From`.
- `From` now perform casts (see above). It used to perform bitwise transmutes.
- `simd` vectors' `replace` method's result is now `#[must_use]`.

* enable backtrace and nocapture

* unalign load/store fail test by 1 byte

* update arm and aarch64 neon modules

* fix arm example

* fmt

* clippy and read example that rustfmt swallowed

* reductions should take self

* rename add/mul -> sum/product; delete other arith reductions

* clean up fmt::LowerHex impl

* revert incorret doc change

* make Hash equivalent to [T; lanes()]

* use travis_wait to increase timeout limit to 20 minutes

* remove travis_wait; did not help

* implement reductions on top of the llvm.experimental.vector.reduction intrinsics

* implement cmp for boolean vectors

* add missing eq impl file

* implement default

* rename llvm intrinsics

* fix aarch64 example error

* replace #[inline(always)] with #[inline]

* remove cargo clean from run.sh

* workaround broken product in aarch64

* make boolean vector constructors const fn

* fix more reductions on aarch64

* fix min/max reductions on aarch64

* remove whitespace

* remove all boolean vector types except for b8xN

* use a sum reduction fallback on aarch64

* disable llvm add reduction for aarch64

* rename the llvm intrinsics to use llvm names

* remove old macros.rs file
2018-03-05 14:32:35 -06:00
Alex Crichton
746ab07521
Compile examples on CI (#329)
Make sure the top-level `examples` folder is registered with the
`stdsimd` crate!
2018-02-25 12:37:08 -06:00
Alex Crichton
39b5ec91ae
Reorganize and refactor source tree (#324)
With RFC 2325 looking close to being accepted, I took a crack at
reorganizing this repository to being more amenable for inclusion in
libstd/libcore. My current plan is to add stdsimd as a submodule in
rust-lang/rust and then use `#[path]` to include the modules directly
into libstd/libcore.

Before this commit, however, the source code of coresimd/stdsimd
themselves were not quite ready for this. Imports wouldn't compile for
one reason or another, and the organization was also different than the
RFC itself!

In addition to moving a lot of files around, this commit has the
following major changes:

* The `cfg_feature_enabled!` macro is now renamed to
  `is_target_feature_detected!`
* The `vendor` module is now called `arch`.
* Under the `arch` module is a suite of modules like `x86`, `x86_64`,
  etc. One per `cfg!(target_arch)`.
* The `is_target_feature_detected!` macro was removed from coresimd.
  Unfortunately libcore has no ability to export unstable macros, so for
  now all feature detection is canonicalized in stdsimd.

The `coresimd` and `stdsimd` crates have been updated to the planned
organization in RFC 2325 as well. The runtime bits saw the largest
amount of refactoring, seeing a good deal of simplification without the
core/std split.
2018-02-18 10:07:35 +09:00
gnzlbg
4d545e713f Run-time feature detection for AES-NI and TSC (#312)
* add runtime detection for aes-ni

* fmtting and fixing some clippy issues

* add runtime-feature detection for tsc

* fix remaining clippy issues

* manually fix some formatting issues

* increase feature cache size

* use 2x AtomicU32 on 32-bit targets as the feature cache

* use the new cache in stdsimd
2018-02-02 09:08:27 -06:00
Alex Crichton
e19b6d9efd
Remove Into/From between x86 and portable types (#292)
This is primarily doing to avoid falling into a portability trap by accident,
and in general makes the vendor types (on x86) going towards as minimal as they
can be. Along the way some tests were cleaned up which were still using the
portable types.
2018-01-19 20:15:07 -06:00
Alex Crichton
54452230a7
Add an example of SIMD-powered hex encoding (#291)
This is lifted from an example elsewhere I found and shows off runtime
dispatching along with a lot of intrinsics being used in a bunch.
2018-01-19 16:53:38 -06:00
Alex Crichton
5c8867c7c3
Update target_feature syntax (#283)
This commit updates to the latest nightly's syntax where `#[target_feature =
"+foo"]` is now deprecated in favor of `#[target_feature(enable = "foo")]`.
Additionally `#[target_feature]` can only be applied to `unsafe` functions for
now.

Along the way this removes a few exampels that were just left around and also
disables the `fxsr` modules as that target feature will need to land in upstream
rust-lang/rust first as it's currently unknown to the compiler.
2018-01-17 09:45:02 -06:00
Alex Crichton
baf9d0e7e0
Migrate the i686::sse module to vendor types (#269)
This migrates the entire `i686::sse` module (and touches a few others) to the
vendor types.
2018-01-09 13:38:09 -06:00
gnzlbg
4fb9420acb
Fix rustfmt (#239)
* [fmt] manually fix some formatting
* [fmt] reformat with rustfmt-nightly
* [clippy] fix clippy issues
2017-12-14 19:57:53 +01:00
gnzlbg
dd9a3f92ff move __m128i to the v128 module 2017-12-13 10:19:09 -05:00
gnzlbg
542aac988a [ci] enable clippy (#62)
* [ci] enable clippy

* [clippy] fix clippy issues
2017-11-02 13:43:12 -04:00
gnzlbg
69d2ad85f3 [ci] check formatting (#64)
* [ci] check formatting

* [rustfmt] reformat the whole library
2017-10-27 11:55:29 -04:00
gnzlbg
1f44e3166e Deny all warnings and fix errors (#135)
* [travis-ci] deny warnings

* fix all warnings
2017-10-22 12:30:26 -05:00
gnzlbg
a3a703d83e [example] nbody (#117) 2017-10-18 17:19:19 -05:00
Andrew Gallant
6dfc65289c x86: add unsafe to all x86 vendor intrinsics
Also, add missing assert_instr tests to each intrinsic, where possible.
2017-09-27 11:04:23 -04:00
Alex Crichton
5a8887b0c0 Add CI for more platforms
This commit adds CI for a few more targets:

* i686-unknown-linux-gnu
* arm-unknown-linux-gnueabihf
* armv7-unknown-linux-gnueabihf
* aarch64-unknown-linux-gnu

The CI here is structured around using a Docker container to set up a test
environment and then QEMU is used to actually execute code from these platforms.
QEMU's emulation actually makes it so we can continue to just use `cargo test`,
as processes can be spawned from QEMU like `objdump` and files can be read (for
libbacktrace). Ends up being a relatively seamless experience!

Note that a number of intrinsics were disabled on i686 because they were failing
tests, and otherwise a few ARM touch-ups were made to get tests passing.
2017-09-21 12:35:46 -07:00
Andrew Gallant
baaa64258b
add scratch 2017-09-17 18:09:04 -04:00
Andrew Gallant
8f490e5dff
fix 2017-06-19 18:34:32 -04:00
Andrew Gallant
f04dd91c71
add strange example that fails 2017-06-19 18:31:05 -04:00
Andrew Gallant
e975e22c20
refactor 2017-06-19 17:06:53 -04:00
Andrew Gallant
1203e97ac0 progress 2017-03-13 20:56:22 -04:00
Andrew Gallant
5bfc38a994 progress 2016-12-28 18:22:09 -05:00
Andrew Gallant
8b27771cc5 progress 2016-12-11 20:35:28 -05:00
Andrew Gallant
c01240299f progress 2016-12-11 18:26:04 -05:00
Andrew Gallant
f268844dc9 progress 2016-12-02 21:46:58 -05:00
Andrew Gallant
535794f129 progress 2016-11-30 19:35:14 -05:00
Andrew Gallant
b5e73d1ed2 progress 2016-11-29 01:06:17 -05:00
Andrew Gallant
1593cf01cd progress 2016-11-28 12:14:57 -05:00
Andrew Gallant
12121fc2bb progress 2016-11-27 01:06:39 -05:00
Andrew Gallant
c709196f7a scratch 2016-11-24 22:45:52 -05:00