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102 Commits

Author SHA1 Message Date
tyler
f7a6b30a99 clippy fix 2019-04-25 09:39:47 +02:00
tyler
b10a06f89b add const unsigned int to simd-verify, shrink test_xabort 2019-04-25 09:39:47 +02:00
tyler
63ece41c95 return u8 from _xtest to more closely match headers (specified to always be 0 or 1) 2019-04-25 09:39:47 +02:00
tyler
f87d80f7c4 Add link to intel instruction set reference 2019-04-25 09:39:47 +02:00
tyler
c1548f2e3c make _xabort_code const 
add top level comment
use simd_test
 2019-04-25 09:39:47 +02:00
tyler
26d6e048cc add rtm cpu feature intrinsics 2019-04-25 09:39:47 +02:00
gnzlbg
5c8d1b9285 [breaking change] fix return type of _rdtsc 2019-04-22 09:04:41 +02:00
gnzlbg
59dd5729f7 [breaking change]: mask argument type of _mm_shuffle_ps 2019-04-20 11:05:00 +02:00
gnzlbg
1813fdc530 Improve docs of SSE4a stream intrinsics 2019-04-20 10:19:22 +02:00
gnzlbg
8a62c501f3 Fix other addcarryx test 2019-04-19 21:05:56 +02:00
gnzlbg
374eee5a2c Add addcarryx test 2019-04-19 21:05:56 +02:00
gnzlbg
173dd11427 Merge imports 2019-04-19 11:34:01 +02:00
gnzlbg
f7560ee7e0 Remove useless comments 2019-04-19 11:34:01 +02:00
gnzlbg
2da1e6bfa9 Enable edition=2018 for core_arch 2019-04-18 07:28:07 +02:00
Mateusz Mikuła
437393a2aa Remove stage0 workarounds 2019-04-17 14:49:25 +02:00
gnzlbg
503b3f641e Bump patch versions 2019-04-17 14:49:15 +02:00
gnzlbg
459afa7a59 Fix clippy issues 2019-04-17 14:20:42 +02:00
gnzlbg
eac0c6c8c1 Migrate clippy lints to tool lints 2019-04-17 14:20:42 +02:00
Radovan Birdic
f32ff2e1d1 Fix MIPS build after #711 2019-04-15 11:23:16 +02:00
Ralf Jung
d2b8c78afb fix rustdoc link failures 2019-04-14 08:43:33 +02:00
gnzlbg
438d260bc2 Make use of integer and pointers consistent 2019-04-11 09:36:52 +02:00
gnzlbg
0cfd07ca9c Make MIPS MSA functions public 2019-04-11 09:36:52 +02:00
Radovan Birdic
acbb4b2165 Added vector types and fixed formating. 2019-04-09 09:43:17 +02:00
Radovan Birdic
d463a50b5a Implement all MSA Intrinsics 2019-04-09 09:43:17 +02:00
gnzlbg
d65a355df5 Formatting 2019-03-29 14:32:54 +01:00
Ryan Leckey
3a8eeddca4 Add bittest instructions for x85 2019-03-29 10:33:56 +01:00
Ralf Jung
cd59f3987e adjust to MaybeUninit renames 2019-03-29 10:33:23 +01:00
gnzlbg
523e2600ae _mm_pause does not require SSE2 
Closes #705 .
 2019-03-18 23:44:22 +01:00
Lokathor
b0771647a8 Revert the regression, add a GBA target to avoid this again 2019-03-18 08:57:03 +01:00
Lokathor
4c24f320f4 oh, they both need double quotes, okay 2019-03-18 08:57:03 +01:00
Lokathor
5450e5248f add the double quotes 2019-03-18 08:57:03 +01:00
Lokathor
76e730f3c7 Limit this to sufficiently advanced devices 2019-03-18 08:57:03 +01:00
Paolo Teti
42cb3a07e6 Fix target arm-linux-androideabi 
Move int16x2_t and uint16x2_t into dsp.rs and export to simd32.rs.
 2019-03-02 23:38:16 +01:00
Paolo Teti
999066b8e2 ACLE/DSP: implement remaining intrinsics 
Adds:

__smulbb, __smulbt, __smultb, __smultt, __smulwb, __smulwt
__qdbl, __smlabb, __smlabt, __smlatb, __smlatt, __smlawb, __smlawt

and related test-cases
 2019-03-02 23:38:16 +01:00
Paolo Teti
2d7479844a The GE bits of the APSR are set also by USUB8 2019-02-27 23:47:50 +01:00
Paolo Teti
86a62c6865 ACLE/SIMD32: add ssub8 and usub8 
- add `ssub8` and `usub8`
- bump instruction limit to 29
 2019-02-27 23:47:50 +01:00
Denys Zariaiev
59dd15f603 Correctly import core::ffi::c_void 2019-02-27 19:43:56 +01:00
Denys Zariaiev
275fc42ad8 NVPTX syscalls 2019-02-27 19:43:56 +01:00
gnzlbg
f7fec1c4cc Always include ACLE when dox is defined 2019-02-24 11:30:40 +01:00
gnzlbg
c91584d241 Make core_arch compatible with Rust2015 and Rust2018 2019-02-23 01:14:07 +01:00
gnzlbg
a177055824 Test Rust2018 builds 2019-02-23 01:14:07 +01:00
Jorge Aparicio
b6dda84343 cargo fmt 2019-02-18 19:29:13 +01:00
Jorge Aparicio
ccba7aa7c9 acle/{dsp,simd32}: fix unit tests 2019-02-18 19:29:13 +01:00
Jorge Aparicio
c7bbc50568 acle/ex: CLREX requires v6k 2019-02-18 19:29:13 +01:00
Mateusz Mikuła
640eb3874e Update crates/core_arch/src/acle/simd32.rs 
Co-Authored-By: japaric <jorge@japaric.io>
 2019-02-18 19:29:13 +01:00
Jorge Aparicio
3957baad18 fix CI 2019-02-18 19:29:13 +01:00
Jorge Aparicio
4524877a54 acle/{dsp,simd32}: add leading underscores to match ACLE spec 2019-02-18 19:29:13 +01:00
Jorge Aparicio
8cf9e1f352 conditionally declare the dmb_dsb macro 2019-02-18 19:29:13 +01:00
Jorge Aparicio
9c541c2057 add missing imports 2019-02-18 19:29:13 +01:00
Jorge Aparicio
8b747beb20 cargo fmt 2019-02-18 19:29:13 +01:00