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321 lines
5.2 KiB
Plaintext
321 lines
5.2 KiB
Plaintext
# Not implemented in stdarch yet
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vbfdot_f32
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vbfdot_lane_f32
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vbfdot_laneq_f32
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vbfdotq_f32
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vbfdotq_lane_f32
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vbfdotq_laneq_f32
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vbfmlalbq_f32
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vbfmlalbq_lane_f32
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vbfmlalbq_laneq_f32
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vbfmlaltq_f32
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vbfmlaltq_lane_f32
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vbfmlaltq_laneq_f32
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vbfmmlaq_f32
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# Implemented in Clang and stdarch for A64 only even though CSV claims A32 support
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vaddq_p64
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vbsl_p64
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vbslq_p64
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vceq_p64
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vceqq_p64
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vceqz_p64
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vceqzq_p64
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vcombine_p64
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vcopy_lane_p64
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vcopy_laneq_p64
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vcopyq_lane_p64
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vcopyq_laneq_p64
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vcreate_p64
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vdup_lane_p64
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vdup_n_p64
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vdupq_lane_p64
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vdupq_n_p64
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vext_p64
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vextq_p64
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vget_high_p64
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vget_lane_p64
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vget_low_p64
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vgetq_lane_p64
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vmovn_high_s16
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vmovn_high_s32
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vmovn_high_s64
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vmovn_high_u16
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vmovn_high_u32
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vmovn_high_u64
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vmull_high_p64
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vmull_p64
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vreinterpret_p16_p64
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vreinterpret_p64_f32
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vreinterpret_p64_p16
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vreinterpret_p64_p8
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vreinterpret_p64_s16
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vreinterpret_p64_s32
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vreinterpret_p64_s8
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vreinterpret_p64_u16
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vreinterpret_p64_u32
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vreinterpret_p64_u64
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vreinterpret_p64_u8
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vreinterpret_p8_p64
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vreinterpretq_f64_u64
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vreinterpretq_p128_f32
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vreinterpretq_p128_p16
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vreinterpretq_p128_p8
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vreinterpretq_p128_s16
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vreinterpretq_p128_s32
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vreinterpretq_p128_s64
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vreinterpretq_p128_s8
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vreinterpretq_p128_u16
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vreinterpretq_p128_u32
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vreinterpretq_p128_u64
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vreinterpretq_p128_u8
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vreinterpretq_p16_p64
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vreinterpretq_p64_f32
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vreinterpretq_p64_p16
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vreinterpretq_p64_p8
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vreinterpretq_p64_s16
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vreinterpretq_p64_s32
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vreinterpretq_p64_s64
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vreinterpretq_p64_s8
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vreinterpretq_p64_u16
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vreinterpretq_p64_u32
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vreinterpretq_p64_u64
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vreinterpretq_p64_u8
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vreinterpretq_p8_p64
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vreinterpretq_s16_p64
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vreinterpretq_s32_p64
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vreinterpretq_s64_p64
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vreinterpretq_s8_p64
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vreinterpretq_u16_p64
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vreinterpretq_u32_p64
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vreinterpretq_u64_p64
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vreinterpretq_u8_p64
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vreinterpret_s16_p64
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vreinterpret_s32_p64
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vreinterpret_s64_p64
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vreinterpret_s8_p64
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vreinterpret_u16_p64
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vreinterpret_u32_p64
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vreinterpret_u64_p64
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vreinterpret_u8_p64
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vrndn_f64
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vrndnq_f64
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vset_lane_p64
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vsetq_lane_p64
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vsli_n_p64
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vsliq_n_p64
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vsri_n_p64
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vsriq_n_p64
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vtst_p64
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vtstq_p64
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vaddh_f16
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vsubh_f16
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vabsh_f16
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vdivh_f16
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vmulh_f16
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vfmsh_f16
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vfmah_f16
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vminnmh_f16
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vmaxnmh_f16
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vrndh_f16
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vrndnh_f16
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vrndih_f16
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vrndah_f16
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vrndph_f16
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vrndmh_f16
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vrndxh_f16
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vsqrth_f16
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vnegh_f16
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vcvth_f16_s32
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vcvth_s32_f16
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vcvth_n_f16_s32
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vcvth_n_s32_f16
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vcvth_f16_u32
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vcvth_u32_f16
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vcvth_n_f16_u32
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vcvth_n_u32_f16
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vcvtah_s32_f16
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vcvtah_u32_f16
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vcvtmh_s32_f16
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vcvtmh_u32_f16
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vcvtpq_s16_f16
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vcvtpq_u16_f16
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vcvtp_s16_f16
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vcvtp_u16_f16
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vcvtph_s32_f16
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vcvtph_u32_f16
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vcvtnh_u32_f16
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vcvtnh_s32_f16
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vfmlsl_low_f16
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vfmlslq_low_f16
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vfmlsl_high_f16
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vfmlslq_high_f16
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vfmlsl_lane_high_f16
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vfmlsl_laneq_high_f16
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vfmlslq_lane_high_f16
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vfmlslq_laneq_high_f16
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vfmlsl_lane_low_f16
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vfmlsl_laneq_low_f16
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vfmlslq_lane_low_f16
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vfmlslq_laneq_low_f16
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vfmlal_low_f16
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vfmlalq_low_f16
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vfmlal_high_f16
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vfmlalq_high_f16
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vfmlal_lane_low_f16
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vfmlal_laneq_low_f16
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vfmlalq_lane_low_f16
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vfmlalq_laneq_low_f16
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vfmlal_lane_high_f16
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vfmlal_laneq_high_f16
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vfmlalq_lane_high_f16
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vfmlalq_laneq_high_f16
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vreinterpret_f16_p64
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vreinterpretq_f16_p64
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vreinterpret_p64_f16
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vreinterpretq_p64_f16
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vreinterpret_p128_f16
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vreinterpretq_p128_f16
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# Present in Clang header but triggers an ICE due to lack of backend support.
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vcmla_f32
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vcmla_lane_f32
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vcmla_laneq_f32
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vcmla_rot180_f32
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vcmla_rot180_lane_f32
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vcmla_rot180_laneq_f32
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vcmla_rot270_f32
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vcmla_rot270_lane_f32
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vcmla_rot270_laneq_f32
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vcmla_rot90_f32
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vcmla_rot90_lane_f32
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vcmla_rot90_laneq_f32
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vcmlaq_f32
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vcmlaq_lane_f32
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vcmlaq_laneq_f32
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vcmlaq_rot180_f32
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vcmlaq_rot180_lane_f32
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vcmlaq_rot180_laneq_f32
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vcmlaq_rot270_f32
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vcmlaq_rot270_lane_f32
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vcmlaq_rot270_laneq_f32
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vcmlaq_rot90_f32
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vcmlaq_rot90_lane_f32
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vcmlaq_rot90_laneq_f32
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vcmla_f16
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vcmlaq_f16
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vcmla_laneq_f16
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vcmla_lane_f16
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vcmla_laneq_f16
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vcmlaq_lane_f16
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vcmlaq_laneq_f16
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vcmla_rot90_f16
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vcmlaq_rot90_f16
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vcmla_rot180_f16
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vcmlaq_rot180_f16
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vcmla_rot270_f16
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vcmlaq_rot270_f16
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vcmla_rot90_lane_f16
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vcmla_rot90_laneq_f16
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vcmlaq_rot90_lane_f16
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vcmlaq_rot90_laneq_f16
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vcmla_rot180_lane_f16
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vcmla_rot180_laneq_f16
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vcmlaq_rot180_lane_f16
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vcmlaq_rot180_laneq_f16
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vcmla_rot270_lane_f16
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vcmla_rot270_laneq_f16
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vcmlaq_rot270_lane_f16
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vcmlaq_rot270_laneq_f16
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# Implemented in stdarch for A64 only, Clang support both A32/A64
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vadd_s64
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vadd_u64
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vcaddq_rot270_f32
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vcaddq_rot90_f32
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vcadd_rot270_f32
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vcadd_rot90_f32
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vcvtaq_s32_f32
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vcvtaq_u32_f32
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vcvta_s32_f32
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vcvta_u32_f32
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vcvtmq_s32_f32
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vcvtmq_u32_f32
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vcvtm_s32_f32
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vcvtm_u32_f32
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vcvtnq_s32_f32
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vcvtnq_u32_f32
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vcvtn_s32_f32
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vcvtn_u32_f32
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vcvtpq_s32_f32
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vcvtpq_u32_f32
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vcvtp_s32_f32
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vcvtp_u32_f32
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vqdmulh_lane_s16
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vqdmulh_lane_s32
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vqdmulhq_lane_s16
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vqdmulhq_lane_s32
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vrnda_f32
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vrnda_f32
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vrndaq_f32
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vrndaq_f32
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vrnd_f32
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vrnd_f32
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vrndi_f32
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vrndi_f32
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vrndiq_f32
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vrndiq_f32
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vrndm_f32
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vrndm_f32
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vrndmq_f32
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vrndmq_f32
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vrndns_f32
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vrndp_f32
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vrndpq_f32
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vrndq_f32
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vrndq_f32
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vrndx_f32
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vrndxq_f32
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vrnda_f16
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vrnda_f16
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vrndaq_f16
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vrndaq_f16
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vrnd_f16
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vrnd_f16
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vrndi_f16
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vrndi_f16
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vrndiq_f16
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vrndiq_f16
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vrndm_f16
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vrndm_f16
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vrndmq_f16
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vrndmq_f16
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vrndns_f16
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vrndp_f16
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vrndpq_f16
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vrndq_f16
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vrndx_f16
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vrndxq_f16
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vpmin_f16
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vpmax_f16
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vcaddq_rot270_f16
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vcaddq_rot90_f16
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vcadd_rot270_f16
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vcadd_rot90_f16
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vcvtm_s16_f16
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vcvtmq_s16_f16
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vcvtm_u16_f16
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vcvtmq_u16_f16
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vcvtaq_s16_f16
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vcvtaq_u16_f16
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vcvtnq_s16_f16
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vcvtnq_u16_f16
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vcvtn_s16_f16
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vcvtn_u16_f16
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vcvtaq_s16_f16
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vcvtaq_u16_f16
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vcvta_s16_f16
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vcvta_u16_f16
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vceqz_f16
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vceqzq_f16
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