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			129 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			Rust
		
	
	
	
	
	
			
		
		
	
	
			129 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			Rust
		
	
	
	
	
	
| //@ add-core-stubs
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| //@ assembly-output: emit-asm
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| //@ compile-flags: -Copt-level=3 -C panic=abort
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| //@ compile-flags: --target aarch64-unknown-linux-gnu
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| //@ compile-flags: -Zmerge-functions=disabled
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| //@ needs-llvm-components: aarch64
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| 
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| #![feature(no_core)]
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| #![crate_type = "rlib"]
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| #![no_core]
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| #![allow(asm_sub_register)]
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| 
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| extern crate minicore;
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| use minicore::*;
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| 
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| macro_rules! check {
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|     ($func:ident $reg:ident $code:literal) => {
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|         // -Copt-level=3 and extern "C" guarantee that the selected register is always r0/s0/d0/q0
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|         #[no_mangle]
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|         pub unsafe extern "C" fn $func() -> i32 {
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|             let y;
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|             asm!($code, out($reg) y);
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|             y
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|         }
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|     };
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| }
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| 
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| // CHECK-LABEL: reg:
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| // CHECK: //APP
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| // CHECK: mov x0, x0
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| // CHECK: //NO_APP
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| check!(reg reg "mov {0}, {0}");
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| 
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| // CHECK-LABEL: reg_w:
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| // CHECK: //APP
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| // CHECK: mov w0, w0
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| // CHECK: //NO_APP
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| check!(reg_w reg "mov {0:w}, {0:w}");
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| 
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| // CHECK-LABEL: reg_x:
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| // CHECK: //APP
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| // CHECK: mov x0, x0
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| // CHECK: //NO_APP
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| check!(reg_x reg "mov {0:x}, {0:x}");
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| 
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| // CHECK-LABEL: vreg:
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| // CHECK: //APP
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| // CHECK: add v0.4s, v0.4s, v0.4s
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| // CHECK: //NO_APP
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| check!(vreg vreg "add {0}.4s, {0}.4s, {0}.4s");
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| 
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| // CHECK-LABEL: vreg_b:
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| // CHECK: //APP
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| // CHECK: ldr b0, [x0]
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| // CHECK: //NO_APP
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| check!(vreg_b vreg "ldr {:b}, [x0]");
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| 
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| // CHECK-LABEL: vreg_h:
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| // CHECK: //APP
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| // CHECK: ldr h0, [x0]
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| // CHECK: //NO_APP
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| check!(vreg_h vreg "ldr {:h}, [x0]");
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| 
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| // CHECK-LABEL: vreg_s:
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| // CHECK: //APP
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| // CHECK: ldr s0, [x0]
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| // CHECK: //NO_APP
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| check!(vreg_s vreg "ldr {:s}, [x0]");
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| 
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| // CHECK-LABEL: vreg_d:
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| // CHECK: //APP
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| // CHECK: ldr d0, [x0]
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| // CHECK: //NO_APP
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| check!(vreg_d vreg "ldr {:d}, [x0]");
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| 
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| // CHECK-LABEL: vreg_q:
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| // CHECK: //APP
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| // CHECK: ldr q0, [x0]
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| // CHECK: //NO_APP
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| check!(vreg_q vreg "ldr {:q}, [x0]");
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| 
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| // CHECK-LABEL: vreg_v:
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| // CHECK: //APP
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| // CHECK: add v0.4s, v0.4s, v0.4s
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| // CHECK: //NO_APP
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| check!(vreg_v vreg "add {0:v}.4s, {0:v}.4s, {0:v}.4s");
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| 
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| // CHECK-LABEL: vreg_low16:
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| // CHECK: //APP
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| // CHECK: add v0.4s, v0.4s, v0.4s
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| // CHECK: //NO_APP
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| check!(vreg_low16 vreg_low16 "add {0}.4s, {0}.4s, {0}.4s");
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| 
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| // CHECK-LABEL: vreg_low16_b:
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| // CHECK: //APP
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| // CHECK: ldr b0, [x0]
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| // CHECK: //NO_APP
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| check!(vreg_low16_b vreg_low16 "ldr {:b}, [x0]");
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| 
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| // CHECK-LABEL: vreg_low16_h:
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| // CHECK: //APP
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| // CHECK: ldr h0, [x0]
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| // CHECK: //NO_APP
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| check!(vreg_low16_h vreg_low16 "ldr {:h}, [x0]");
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| 
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| // CHECK-LABEL: vreg_low16_s:
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| // CHECK: //APP
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| // CHECK: ldr s0, [x0]
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| // CHECK: //NO_APP
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| check!(vreg_low16_s vreg_low16 "ldr {:s}, [x0]");
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| 
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| // CHECK-LABEL: vreg_low16_d:
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| // CHECK: //APP
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| // CHECK: ldr d0, [x0]
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| // CHECK: //NO_APP
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| check!(vreg_low16_d vreg_low16 "ldr {:d}, [x0]");
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| 
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| // CHECK-LABEL: vreg_low16_q:
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| // CHECK: //APP
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| // CHECK: ldr q0, [x0]
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| // CHECK: //NO_APP
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| check!(vreg_low16_q vreg_low16 "ldr {:q}, [x0]");
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| 
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| // CHECK-LABEL: vreg_low16_v:
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| // CHECK: //APP
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| // CHECK: add v0.4s, v0.4s, v0.4s
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| // CHECK: //NO_APP
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| check!(vreg_low16_v vreg_low16 "add {0:v}.4s, {0:v}.4s, {0:v}.4s");
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