Tsukasa OI 5ebdec5ac2 rustc_codegen_llvm: Adjust RISC-V inline assembly's clobber list ...

Despite that the `fflags` register (representing floating point
exception flags) is stated as a flag register in the reference, it's not
in the default clobber list of the RISC-V inline assembly and it would
be better to fix it.

2025-09-15 02:16:34 +00:00

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aarch64-clobbers.rs

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avr-clobbers.rs

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bpf-clobbers.rs

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critical.rs

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csky-clobbers.rs

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foo.s

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global_asm_include.rs

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global_asm_x2.rs

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global_asm.rs

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goto.rs

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hexagon-clobbers.rs

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may_unwind.rs

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maybe-uninit.rs

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msp430-clobbers.rs

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multiple-options.rs

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options.rs

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powerpc-clobbers.rs

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riscv-clobbers.rs

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s390x-clobbers.rs

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sanitize-llvm.rs

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sparc-clobbers.rs

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x86-clobber_abi.rs

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x86-clobbers.rs

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x86-target-clobbers.rs

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