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This is already included with the regular stability attributes, and some of this is now stable, while some of it is not.
452 lines
17 KiB
Rust
452 lines
17 KiB
Rust
//! `stdsimd`
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/// SIMD and vendor intrinsics module.
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///
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/// This module is intended to be the gateway to architecture-specific
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/// intrinsic functions, typically related to SIMD (but not always!). Each
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/// architecture that Rust compiles to may contain a submodule here, which
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/// means that this is not a portable module! If you're writing a portable
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/// library take care when using these APIs!
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///
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/// Under this module you'll find an architecture-named module, such as
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/// `x86_64`. Each `#[cfg(target_arch)]` that Rust can compile to may have a
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/// module entry here, only present on that particular target. For example the
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/// `i686-pc-windows-msvc` target will have an `x86` module here, whereas
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/// `x86_64-pc-windows-msvc` has `x86_64`.
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///
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/// [rfc]: https://github.com/rust-lang/rfcs/pull/2325
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/// [tracked]: https://github.com/rust-lang/rust/issues/48556
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///
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/// # Overview
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///
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/// This module exposes vendor-specific intrinsics that typically correspond to
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/// a single machine instruction. These intrinsics are not portable: their
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/// availability is architecture-dependent, and not all machines of that
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/// architecture might provide the intrinsic.
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///
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/// The `arch` module is intended to be a low-level implementation detail for
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/// higher-level APIs. Using it correctly can be quite tricky as you need to
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/// ensure at least a few guarantees are upheld:
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///
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/// * The correct architecture's module is used. For example the `arm` module
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/// isn't available on the `x86_64-unknown-linux-gnu` target. This is
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/// typically done by ensuring that `#[cfg]` is used appropriately when using
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/// this module.
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/// * The CPU the program is currently running on supports the function being
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/// called. For example it is unsafe to call an AVX2 function on a CPU that
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/// doesn't actually support AVX2.
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///
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/// As a result of the latter of these guarantees all intrinsics in this module
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/// are `unsafe` and extra care needs to be taken when calling them!
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///
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/// # CPU Feature Detection
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///
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/// In order to call these APIs in a safe fashion there's a number of
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/// mechanisms available to ensure that the correct CPU feature is available
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/// to call an intrinsic. Let's consider, for example, the `_mm256_add_epi64`
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/// intrinsics on the `x86` and `x86_64` architectures. This function requires
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/// the AVX2 feature as [documented by Intel][intel-dox] so to correctly call
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/// this function we need to (a) guarantee we only call it on `x86`/`x86_64`
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/// and (b) ensure that the CPU feature is available
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///
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/// [intel-dox]: https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_add_epi64&expand=100
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///
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/// ## Static CPU Feature Detection
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///
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/// The first option available to us is to conditionally compile code via the
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/// `#[cfg]` attribute. CPU features correspond to the `target_feature` cfg
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/// available, and can be used like so:
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///
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/// ```ignore
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/// #[cfg(all(any(target_arch = "x86", target_arch = "x86_64"),
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/// target_feature = "avx2"))]
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/// fn foo() {
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/// #[cfg(target_arch = "x86")]
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/// use std::arch::x86::_mm256_add_epi64;
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/// #[cfg(target_arch = "x86_64")]
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/// use std::arch::x86_64::_mm256_add_epi64;
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///
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/// unsafe {
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/// _mm256_add_epi64(...);
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/// }
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/// }
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/// ```
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///
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/// Here we're using `#[cfg(target_feature = "avx2")]` to conditionally compile
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/// this function into our module. This means that if the `avx2` feature is
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/// *enabled statically* then we'll use the `_mm256_add_epi64` function at
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/// runtime. The `unsafe` block here can be justified through the usage of
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/// `#[cfg]` to only compile the code in situations where the safety guarantees
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/// are upheld.
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///
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/// Statically enabling a feature is typically done with the `-C
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/// target-feature` or `-C target-cpu` flags to the compiler. For example if
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/// your local CPU supports AVX2 then you can compile the above function with:
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///
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/// ```sh
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/// $ RUSTFLAGS='-C target-cpu=native' cargo build
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/// ```
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///
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/// Or otherwise you can specifically enable just the AVX2 feature:
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///
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/// ```sh
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/// $ RUSTFLAGS='-C target-feature=+avx2' cargo build
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/// ```
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///
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/// Note that when you compile a binary with a particular feature enabled it's
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/// important to ensure that you only run the binary on systems which satisfy
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/// the required feature set.
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///
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/// ## Dynamic CPU Feature Detection
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///
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/// Sometimes statically dispatching isn't quite what you want. Instead you
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/// might want to build a portable binary that runs across a variety of CPUs,
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/// but at runtime it selects the most optimized implementation available. This
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/// allows you to build a "least common denominator" binary which has certain
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/// sections more optimized for different CPUs.
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///
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/// Taking our previous example from before, we're going to compile our binary
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/// *without* AVX2 support, but we'd like to enable it for just one function.
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/// We can do that in a manner like:
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///
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/// ```ignore
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/// fn foo() {
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/// #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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/// {
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/// if is_x86_feature_detected!("avx2") {
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/// return unsafe { foo_avx2() };
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/// }
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/// }
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///
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/// // fallback implementation without using AVX2
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/// }
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///
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/// #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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/// #[target_feature(enable = "avx2")]
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/// unsafe fn foo_avx2() {
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/// #[cfg(target_arch = "x86")]
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/// use std::arch::x86::_mm256_add_epi64;
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/// #[cfg(target_arch = "x86_64")]
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/// use std::arch::x86_64::_mm256_add_epi64;
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///
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/// _mm256_add_epi64(...);
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/// }
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/// ```
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///
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/// There's a couple of components in play here, so let's go through them in
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/// detail!
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///
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/// * First up we notice the `is_x86_feature_detected!` macro. Provided by
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/// the standard library, this macro will perform necessary runtime detection
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/// to determine whether the CPU the program is running on supports the
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/// specified feature. In this case the macro will expand to a boolean
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/// expression evaluating to whether the local CPU has the AVX2 feature or
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/// not.
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///
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/// Note that this macro, like the `arch` module, is platform-specific. The
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/// name of the macro is the same across platforms, but the arguments to the
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/// macro are only the features for the current platform. For example calling
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/// `is_x86_feature_detected!("avx2")` on ARM will be a compile time
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/// error. To ensure we don't hit this error a statement level `#[cfg]` is
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/// used to only compile usage of the macro on `x86`/`x86_64`.
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///
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/// * Next up we see our AVX2-enabled function, `foo_avx2`. This function is
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/// decorated with the `#[target_feature]` attribute which enables a CPU
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/// feature for just this one function. Using a compiler flag like `-C
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/// target-feature=+avx2` will enable AVX2 for the entire program, but using
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/// an attribute will only enable it for the one function. Usage of the
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/// `#[target_feature]` attribute currently requires the function to also be
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/// `unsafe`, as we see here. This is because the function can only be
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/// correctly called on systems which have the AVX2 (like the intrinsics
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/// themselves).
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///
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/// And with all that we should have a working program! This program will run
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/// across all machines and it'll use the optimized AVX2 implementation on
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/// machines where support is detected.
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///
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/// # Ergonomics
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///
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/// It's important to note that using the `arch` module is not the easiest
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/// thing in the world, so if you're curious to try it out you may want to
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/// brace yourself for some wordiness!
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///
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/// The primary purpose of this module is to enable stable crates on crates.io
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/// to build up much more ergonomic abstractions which end up using SIMD under
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/// the hood. Over time these abstractions may also move into the standard
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/// library itself, but for now this module is tasked with providing the bare
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/// minimum necessary to use vendor intrinsics on stable Rust.
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///
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/// # Other architectures
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///
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/// This documentation is only for one particular architecture, you can find
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/// others at:
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///
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/// * [`x86`]
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/// * [`x86_64`]
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/// * [`arm`]
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/// * [`aarch64`]
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/// * [`mips`]
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/// * [`mips64`]
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///
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/// [`x86`]: https://rust-lang-nursery.github.io/stdsimd/i686/stdsimd/arch/x86/index.html
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/// [`x86_64`]: https://rust-lang-nursery.github.io/stdsimd/x86_64/stdsimd/arch/x86_64/index.html
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/// [`arm`]: https://rust-lang-nursery.github.io/stdsimd/arm/stdsimd/arch/arm/index.html
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/// [`aarch64`]: https://rust-lang-nursery.github.io/stdsimd/aarch64/stdsimd/arch/aarch64/index.html
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/// [`mips`]: https://rust-lang-nursery.github.io/stdsimd/aarch64/stdsimd/arch/mips/index.html
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/// [`mips64`]: https://rust-lang-nursery.github.io/stdsimd/aarch64/stdsimd/arch/mips64/index.html
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///
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/// # Examples
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///
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/// First let's take a look at not actually using any intrinsics but instead
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/// using LLVM's auto-vectorization to produce optimized vectorized code for
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/// AVX2 and also for the default platform.
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///
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/// ```rust
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/// # #![cfg_attr(not(dox), feature(cfg_target_feature, target_feature, stdsimd))]
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///
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/// # #[cfg(not(dox))]
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/// # #[macro_use]
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/// # extern crate stdsimd;
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///
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/// fn main() {
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/// let mut dst = [0];
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/// add_quickly(&[1], &[2], &mut dst);
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/// assert_eq!(dst[0], 3);
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/// }
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///
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/// fn add_quickly(a: &[u8], b: &[u8], c: &mut [u8]) {
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/// #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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/// {
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/// // Note that this `unsafe` block is safe because we're testing
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/// // that the `avx2` feature is indeed available on our CPU.
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/// if is_x86_feature_detected!("avx2") {
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/// return unsafe { add_quickly_avx2(a, b, c) }
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/// }
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/// }
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///
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/// add_quickly_fallback(a, b, c)
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/// }
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///
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/// #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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/// #[target_feature(enable = "avx2")]
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/// unsafe fn add_quickly_avx2(a: &[u8], b: &[u8], c: &mut [u8]) {
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/// add_quickly_fallback(a, b, c) // the function below is inlined here
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/// }
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///
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/// fn add_quickly_fallback(a: &[u8], b: &[u8], c: &mut [u8]) {
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/// for ((a, b), c) in a.iter().zip(b).zip(c) {
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/// *c = *a + *b;
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/// }
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/// }
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/// ```
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///
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/// Next up let's take a look at an example of manually using intrinsics. Here
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/// we'll be using SSE4.1 features to implement hex encoding.
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///
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/// ```
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/// # #![cfg_attr(not(dox), feature(cfg_target_feature, target_feature, stdsimd))]
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/// # #![cfg_attr(not(dox), no_std)]
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/// # #[cfg(not(dox))]
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/// # extern crate std as real_std;
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/// # #[cfg(not(dox))]
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/// # #[macro_use]
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/// # extern crate stdsimd as std;
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///
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/// fn main() {
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/// let mut dst = [0; 32];
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/// hex_encode(b"\x01\x02\x03", &mut dst);
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/// assert_eq!(&dst[..6], b"010203");
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///
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/// let mut src = [0; 16];
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/// for i in 0..16 {
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/// src[i] = (i + 1) as u8;
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/// }
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/// hex_encode(&src, &mut dst);
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/// assert_eq!(&dst, b"0102030405060708090a0b0c0d0e0f10");
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/// }
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///
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/// pub fn hex_encode(src: &[u8], dst: &mut [u8]) {
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/// let len = src.len().checked_mul(2).unwrap();
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/// assert!(dst.len() >= len);
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///
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/// #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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/// {
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/// if is_x86_feature_detected!("sse4.1") {
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/// return unsafe { hex_encode_sse41(src, dst) };
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/// }
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/// }
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///
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/// hex_encode_fallback(src, dst)
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/// }
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///
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/// // translated from https://github.com/Matherunner/bin2hex-sse/blob/master/base16_sse4.cpp
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/// #[target_feature(enable = "sse4.1")]
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/// #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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/// unsafe fn hex_encode_sse41(mut src: &[u8], dst: &mut [u8]) {
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/// #[cfg(target_arch = "x86")]
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/// use std::arch::x86::*;
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/// #[cfg(target_arch = "x86_64")]
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/// use std::arch::x86_64::*;
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///
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/// let ascii_zero = _mm_set1_epi8(b'0' as i8);
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/// let nines = _mm_set1_epi8(9);
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/// let ascii_a = _mm_set1_epi8((b'a' - 9 - 1) as i8);
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/// let and4bits = _mm_set1_epi8(0xf);
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///
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/// let mut i = 0_isize;
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/// while src.len() >= 16 {
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/// let invec = _mm_loadu_si128(src.as_ptr() as *const _);
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///
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/// let masked1 = _mm_and_si128(invec, and4bits);
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/// let masked2 = _mm_and_si128(_mm_srli_epi64(invec, 4), and4bits);
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///
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/// // return 0xff corresponding to the elements > 9, or 0x00 otherwise
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/// let cmpmask1 = _mm_cmpgt_epi8(masked1, nines);
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/// let cmpmask2 = _mm_cmpgt_epi8(masked2, nines);
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///
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/// // add '0' or the offset depending on the masks
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/// let masked1 = _mm_add_epi8(
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/// masked1,
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/// _mm_blendv_epi8(ascii_zero, ascii_a, cmpmask1),
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/// );
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/// let masked2 = _mm_add_epi8(
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/// masked2,
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/// _mm_blendv_epi8(ascii_zero, ascii_a, cmpmask2),
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/// );
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///
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/// // interleave masked1 and masked2 bytes
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/// let res1 = _mm_unpacklo_epi8(masked2, masked1);
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/// let res2 = _mm_unpackhi_epi8(masked2, masked1);
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///
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/// _mm_storeu_si128(dst.as_mut_ptr().offset(i * 2) as *mut _, res1);
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/// _mm_storeu_si128(dst.as_mut_ptr().offset(i * 2 + 16) as *mut _,
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/// res2); src = &src[16..];
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/// i += 16;
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/// }
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///
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/// let i = i as usize;
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/// hex_encode_fallback(src, &mut dst[i * 2..]);
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/// }
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///
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/// fn hex_encode_fallback(src: &[u8], dst: &mut [u8]) {
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/// fn hex(byte: u8) -> u8 {
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/// static TABLE: &[u8] = b"0123456789abcdef";
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/// TABLE[byte as usize]
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/// }
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///
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/// for (byte, slots) in src.iter().zip(dst.chunks_mut(2)) {
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/// slots[0] = hex((*byte >> 4) & 0xf);
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/// slots[1] = hex(*byte & 0xf);
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/// }
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/// }
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/// ```
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#[stable(feature = "simd_arch", since = "1.27.0")]
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pub mod arch {
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#[cfg(all(not(dox), target_arch = "x86"))]
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#[stable(feature = "simd_x86", since = "1.27.0")]
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pub use coresimd::arch::x86;
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#[cfg(all(not(dox), target_arch = "x86_64"))]
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#[stable(feature = "simd_x86", since = "1.27.0")]
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pub use coresimd::arch::x86_64;
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#[cfg(all(not(dox), target_arch = "arm"))]
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#[unstable(feature = "stdsimd", issue = "0")]
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pub use coresimd::arch::arm;
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#[cfg(all(not(dox), target_arch = "aarch64"))]
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#[unstable(feature = "stdsimd", issue = "0")]
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pub use coresimd::arch::aarch64;
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#[cfg(target_arch = "wasm32")]
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#[unstable(feature = "stdsimd", issue = "0")]
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pub use coresimd::arch::wasm32;
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#[cfg(all(not(dox), target_arch = "mips"))]
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#[unstable(feature = "stdsimd", issue = "0")]
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pub use coresimd::arch::mips;
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#[cfg(all(not(dox), target_arch = "mips64"))]
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#[unstable(feature = "stdsimd", issue = "0")]
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pub use coresimd::arch::mips64;
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#[doc(hidden)] // unstable implementation detail
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#[unstable(feature = "stdsimd", issue = "0")]
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pub mod detect;
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/// Platform-specific intrinsics for the `x86` platform.
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///
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/// The documentation with the full listing of `x86` intrinsics is
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/// available in [libcore], but the module is re-exported here in std
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/// as well.
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///
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/// [libcore]: ../../../core/arch/x86/index.html
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#[cfg(dox)]
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#[doc(cfg(target_arch = "x86"))]
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#[stable(feature = "simd_x86", since = "1.27.0")]
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pub mod x86 {}
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/// Platform-specific intrinsics for the `x86_64` platform.
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///
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/// The documentation with the full listing of `x86_64` intrinsics is
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/// available in [libcore], but the module is re-exported here in std
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/// as well.
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///
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/// [libcore]: ../../../core/arch/x86_64/index.html
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#[cfg(dox)]
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#[doc(cfg(target_arch = "x86_64"))]
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#[stable(feature = "simd_x86", since = "1.27.0")]
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pub mod x86_64 {}
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/// Platform-specific intrinsics for the `arm` platform.
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///
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/// The documentation with the full listing of `arm` intrinsics is
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/// available in [libcore], but the module is re-exported here in std
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/// as well.
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///
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/// [libcore]: ../../../core/arch/arm/index.html
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#[cfg(dox)]
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#[doc(cfg(target_arch = "arm"))]
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#[unstable(feature = "stdsimd", issue = "0")]
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pub mod arm {}
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/// Platform-specific intrinsics for the `aarch64` platform.
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///
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/// The documentation with the full listing of `aarch64` intrinsics is
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/// available in [libcore], but the module is re-exported here in std
|
|
/// as well.
|
|
///
|
|
/// [libcore]: ../../../core/arch/aarch64/index.html
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|
#[cfg(dox)]
|
|
#[doc(cfg(target_arch = "aarch64"))]
|
|
#[unstable(feature = "stdsimd", issue = "0")]
|
|
pub mod aarch64 {}
|
|
|
|
/// Platform-specific intrinsics for the `mips` platform.
|
|
///
|
|
/// The documentation with the full listing of `mips` intrinsics is
|
|
/// available in [libcore], but the module is re-exported here in std
|
|
/// as well.
|
|
///
|
|
/// [libcore]: ../../../core/arch/mips/index.html
|
|
#[cfg(dox)]
|
|
#[doc(cfg(target_arch = "mips"))]
|
|
#[unstable(feature = "stdsimd", issue = "0")]
|
|
pub mod mips {}
|
|
|
|
/// Platform-specific intrinsics for the `mips64` platform.
|
|
///
|
|
/// The documentation with the full listing of `mips64` intrinsics is
|
|
/// available in [libcore], but the module is re-exported here in std
|
|
/// as well.
|
|
///
|
|
/// [libcore]: ../../../core/arch/mips64/index.html
|
|
#[cfg(dox)]
|
|
#[doc(cfg(target_arch = "mips64"))]
|
|
#[unstable(feature = "stdsimd", issue = "0")]
|
|
pub mod mips64 {}
|
|
}
|
|
|
|
#[unstable(feature = "stdsimd", issue = "0")]
|
|
pub use coresimd::simd;
|