Jacob Pratt 0eb8a66130

Rollup merge of #142588 - ZuseZ4:generic-ctx-imprv, r=oli-obk ...

Generic ctx imprv

Cleanup work for my gpu pr

r? `@oli-obk`

2025-06-17 23:19:36 +02:00

..

back

Mark all optimize methods and the codegen method as safe

2025-05-28 20:55:00 +00:00

builder

add and use generic get_const_int function

2025-06-16 14:23:06 -07:00

coverageinfo

Remove methods from StaticCodegenMethods that are not called in cg_ssa itself

2025-05-28 20:55:00 +00:00

debuginfo

Change tag_field to FieldIdx in Variants::Multiple

2025-06-03 23:42:21 -07:00

llvm

Use LLVMIntrinsicGetDeclaration to completely remove the hardcoded intrinsics list

2025-06-15 22:15:16 +05:30

abi.rs

Fix RISC-V C function ABI when passing/returning structs containing floats

2025-06-16 10:14:07 +01:00

allocator.rs

Remove implicit #[no_mangle] for #[rustc_std_internal_symbol]

2025-03-17 14:08:09 +00:00

asm.rs

Add f16 inline asm support for LoongArch

2025-06-14 09:39:30 +08:00

attributes.rs

use #[naked] for __rust_probestack

2025-06-10 10:08:57 +02:00

base.rs

Make predefine methods take &mut self

2025-05-28 20:55:00 +00:00

builder.rs

Correctly account for different address spaces in LLVM intrinsic invocations

2025-06-15 22:45:26 +05:30

callee.rs

don't depend on rustc_attr_parsing if rustc_data_structures will do

2025-05-09 23:16:55 +02:00

common.rs

make more CodegenCx function generic

2025-06-16 10:36:15 -07:00

consts.rs

store target.min_global_align as an Align

2025-06-07 22:06:42 +02:00

context.rs

Rollup merge of #142588 - ZuseZ4:generic-ctx-imprv, r=oli-obk

2025-06-17 23:19:36 +02:00

declare.rs

Make allocator shim creation mostly use safe code

2025-02-24 15:11:29 +00:00

errors.rs

-Zretpoline and -Zretpoline-external-thunk flags (target modifiers) to enable retpoline-related target features

2025-06-09 21:29:59 +07:00

intrinsic.rs

Correctly account for different address spaces in LLVM intrinsic invocations

2025-06-15 22:45:26 +05:30

lib.rs

Rollup merge of #141769 - bjorn3:codegen_metadata_module_rework, r=workingjubilee,saethlin

2025-06-15 23:51:54 +02:00

llvm_util.rs

-Zretpoline and -Zretpoline-external-thunk flags (target modifiers) to enable retpoline-related target features

2025-06-09 21:29:59 +07:00

mono_item.rs

Make predefine methods take &mut self

2025-05-28 20:55:00 +00:00

type_.rs

Use LLVMIntrinsicGetDeclaration to completely remove the hardcoded intrinsics list

2025-06-15 22:15:16 +05:30

type_of.rs

rename BackendRepr::Vector → SimdVector

2025-02-28 17:17:45 +01:00

va_arg.rs

implement va_arg for powerpc

2025-06-01 00:51:01 +02:00

value.rs

…