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Merge pull request #3922 from antonellocontini/f413-fix-i2s-pll-source-selection

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Fix I2S PLL source selection for F413/F423/F412
This commit is contained in:
Dario Nieuwenhuis 2025-04-06 21:58:26 +00:00 committed by GitHub
commit 068b3c90d4
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1 changed files with 24 additions and 1 deletions
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25
embassy-stm32/src/rcc/f247.rs
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@ -1,5 +1,7 @@
use stm32_metapac::flash::vals::Latency;
#[cfg(any(stm32f413, stm32f423, stm32f412))]
pub use crate::pac::rcc::vals::Plli2ssrc as Plli2sSource;
pub use crate::pac::rcc::vals::{
Hpre as AHBPrescaler, Pllm as PllPreDiv, Plln as PllMul, Pllp as PllPDiv, Pllq as PllQDiv, Pllr as PllRDiv,
Pllsrc as PllSource, Ppre as APBPrescaler, Sw as Sysclk,
@ -84,6 +86,8 @@ pub struct Config {
pub sys: Sysclk,
pub pll_src: PllSource,
#[cfg(any(stm32f412, stm32f413, stm32f423))]
pub external_i2s_clock: Option<Hertz>,
pub pll: Option<Pll>,
#[cfg(any(stm32f2, all(stm32f4, not(stm32f410)), stm32f7))]
@ -111,6 +115,8 @@ impl Default for Config {
hse: None,
sys: Sysclk::HSI,
pll_src: PllSource::HSI,
#[cfg(any(stm32f412, stm32f413, stm32f423))]
external_i2s_clock: None,
pll: None,
#[cfg(any(stm32f2, all(stm32f4, not(stm32f410)), stm32f7))]
plli2s: None,
@ -185,6 +191,8 @@ pub(crate) unsafe fn init(config: Config) {
let pll_input = PllInput {
hse,
hsi,
#[cfg(any(stm32f412, stm32f413, stm32f423))]
external: config.external_i2s_clock,
source: config.pll_src,
};
let pll = init_pll(PllInstance::Pll, config.pll, &pll_input);
@ -318,6 +326,8 @@ struct PllInput {
source: PllSource,
hsi: Option<Hertz>,
hse: Option<Hertz>,
#[cfg(any(stm32f412, stm32f413, stm32f423))]
external: Option<Hertz>,
}
#[derive(Default)]
@ -362,10 +372,17 @@ fn init_pll(instance: PllInstance, config: Option<Pll>, input: &PllInput) -> Pll
let Some(pll) = config else { return PllOutput::default() };
#[cfg(not(any(stm32f412, stm32f413, stm32f423)))]
let pll_src = match input.source {
PllSource::HSE => input.hse,
PllSource::HSI => input.hsi,
};
#[cfg(any(stm32f412, stm32f413, stm32f423))]
let pll_src = match (input.source, input.external) {
(PllSource::HSE, None) => input.hse,
(PllSource::HSI, None) => input.hsi,
(_, Some(ext)) => Some(ext),
};
let pll_src = pll_src.unwrap();
@ -417,7 +434,13 @@ fn init_pll(instance: PllInstance, config: Option<Pll>, input: &PllInput) -> Pll
#[cfg(any(stm32f411, stm32f412, stm32f413, stm32f423, stm32f446))]
w.set_pllm(pll.prediv);
#[cfg(any(stm32f412, stm32f413, stm32f423))]
w.set_pllsrc(input.source);
{
let plli2ssource = match input.external {
Some(_) => Plli2sSource::EXTERNAL,
None => Plli2sSource::HSE_HSI,
};
w.set_plli2ssrc(plli2ssource);
}
write_fields!(w);
}),