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Add PIO clock divider utility and refactor related modules
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embassy-rp/src/pio_programs/clock_divider.rs
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25
embassy-rp/src/pio_programs/clock_divider.rs
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//! Helper functions for calculating PIO clock dividers
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use fixed::traits::ToFixed;
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use fixed::types::extra::U8;
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use crate::clocks::clk_sys_freq;
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/// Calculate a PIO clock divider value based on the desired target frequency.
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///
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/// # Arguments
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///
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/// * `target_hz` - The desired PIO clock frequency in Hz
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///
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/// # Returns
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///
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/// A fixed-point divider value suitable for use in a PIO state machine configuration
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#[inline]
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pub fn calculate_pio_clock_divider(target_hz: u32) -> fixed::FixedU32<U8> {
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// Requires a non-zero frequency
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assert!(target_hz > 0, "PIO clock frequency cannot be zero");
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// Calculate the divider
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let divider = (clk_sys_freq() + target_hz / 2) / target_hz;
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divider.to_fixed()
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}
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//! [HD44780 display driver](https://www.sparkfun.com/datasheets/LCD/HD44780.pdf)
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use crate::clocks::clk_sys_freq;
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use crate::dma::{AnyChannel, Channel};
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use crate::pio::{
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Common, Config, Direction, FifoJoin, Instance, Irq, LoadedProgram, PioPin, ShiftConfig, ShiftDirection,
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StateMachine,
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};
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use crate::pio_programs::clock_divider::calculate_pio_clock_divider;
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use crate::Peri;
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/// This struct represents a HD44780 program that takes command words (<wait:24> <command:4> <0:4>)
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@ -136,10 +136,8 @@ impl<'l, P: Instance, const S: usize> PioHD44780<'l, P, S> {
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let mut cfg = Config::default();
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cfg.use_program(&word_prg.prg, &[&e]);
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// Scale the divider based on system clock frequency
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// Original: 125 at 125 MHz (1 MHz PIO clock)
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let word_divider = (clk_sys_freq() / 1_000_000) as u8; // Target 1 MHz PIO clock
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cfg.clock_divider = word_divider.into();
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// Target 1 MHz PIO clock (each cycle is 1µs)
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cfg.clock_divider = calculate_pio_clock_divider(1_000_000);
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cfg.set_out_pins(&[&db4, &db5, &db6, &db7]);
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cfg.shift_out = ShiftConfig {
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@ -167,10 +165,8 @@ impl<'l, P: Instance, const S: usize> PioHD44780<'l, P, S> {
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let mut cfg = Config::default();
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cfg.use_program(&seq_prg.prg, &[&e]);
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// Original: 8 at 125 MHz (~15.6 MHz PIO clock)
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// Comment says ~64ns/insn which is 1/(15.6 MHz) = ~64ns
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let seq_divider = (clk_sys_freq() / 15_600_000) as u8; // Target ~15.6 MHz PIO clock (~64ns/insn)
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cfg.clock_divider = seq_divider.into();
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// Target ~15.6 MHz PIO clock (~64ns/insn)
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cfg.clock_divider = calculate_pio_clock_divider(15_600_000);
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cfg.set_jmp_pin(&db7);
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cfg.set_set_pins(&[&rs, &rw]);
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@ -1,5 +1,6 @@
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//! Pre-built pio programs for common interfaces
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pub mod clock_divider;
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pub mod hd44780;
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pub mod i2s;
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pub mod onewire;
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//! PIO backed quadrature encoder
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use fixed::traits::ToFixed;
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use crate::clocks::clk_sys_freq;
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use crate::gpio::Pull;
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use crate::pio::{
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Common, Config, Direction as PioDirection, FifoJoin, Instance, LoadedProgram, PioPin, ShiftDirection, StateMachine,
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};
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use crate::pio_programs::clock_divider::calculate_pio_clock_divider;
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use crate::Peri;
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/// This struct represents an Encoder program loaded into pio instruction memory.
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@ -50,10 +48,8 @@ impl<'d, T: Instance, const SM: usize> PioEncoder<'d, T, SM> {
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cfg.fifo_join = FifoJoin::RxOnly;
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cfg.shift_in.direction = ShiftDirection::Left;
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// Original: 10_000 at 125 MHz (12.5 KHz PIO clock)
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// Scale divider to maintain same PIO clock frequency at different system clocks
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let divider = (clk_sys_freq() as f32 / 12_500.0).to_fixed();
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cfg.clock_divider = divider;
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// Target 12.5 KHz PIO clock
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cfg.clock_divider = calculate_pio_clock_divider(12_500);
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cfg.use_program(&program.prg, &[]);
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sm.set_config(&cfg);
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@ -2,12 +2,8 @@
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use core::mem::{self, MaybeUninit};
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use fixed::traits::ToFixed;
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use fixed::types::extra::U8;
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use fixed::FixedU32;
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use crate::clocks::clk_sys_freq;
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use crate::pio::{Common, Config, Direction, Instance, Irq, LoadedProgram, PioPin, StateMachine};
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use crate::pio_programs::clock_divider::calculate_pio_clock_divider;
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use crate::Peri;
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/// This struct represents a Stepper driver program loaded into pio instruction memory.
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@ -65,7 +61,9 @@ impl<'d, T: Instance, const SM: usize> PioStepper<'d, T, SM> {
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sm.set_pin_dirs(Direction::Out, &[&pin0, &pin1, &pin2, &pin3]);
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let mut cfg = Config::default();
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cfg.set_out_pins(&[&pin0, &pin1, &pin2, &pin3]);
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cfg.clock_divider = (clk_sys_freq() / (100 * 136)).to_fixed();
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cfg.clock_divider = calculate_pio_clock_divider(100 * 136);
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cfg.use_program(&program.prg, &[]);
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sm.set_config(&cfg);
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sm.set_enable(true);
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@ -74,9 +72,11 @@ impl<'d, T: Instance, const SM: usize> PioStepper<'d, T, SM> {
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/// Set pulse frequency
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pub fn set_frequency(&mut self, freq: u32) {
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let clock_divider: FixedU32<U8> = (clk_sys_freq() / (freq * 136)).to_fixed();
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assert!(clock_divider <= 65536, "clkdiv must be <= 65536");
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assert!(clock_divider >= 1, "clkdiv must be >= 1");
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let clock_divider = calculate_pio_clock_divider(freq * 136);
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let divider_f32 = clock_divider.to_num::<f32>();
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assert!(divider_f32 <= 65536.0, "clkdiv must be <= 65536");
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assert!(divider_f32 >= 1.0, "clkdiv must be >= 1");
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self.sm.set_clock_divider(clock_divider);
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self.sm.clkdiv_restart();
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}
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