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Merge pull request #4054 from embassy-rs/ringbuffer2
fix(stm32): handle half-duplex in ringbuffered read
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commit
5bd610b0de
3
ci.sh
3
ci.sh
@ -328,8 +328,9 @@ rm out/tests/stm32wb55rg/wpan_ble
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# unstable, I think it's running out of RAM?
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rm out/tests/stm32f207zg/eth
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# temporarily disabled, hard faults for unknown reasons
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# temporarily disabled, flaky.
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rm out/tests/stm32f207zg/usart_rx_ringbuffered
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rm out/tests/stm32l152re/usart_rx_ringbuffered
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# doesn't work, gives "noise error", no idea why. usart_dma does pass.
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rm out/tests/stm32u5a5zj/usart
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@ -711,7 +711,6 @@ impl<'d> UartRx<'d, Async> {
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// make sure USART state is restored to neutral state when this future is dropped
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let on_drop = OnDrop::new(move || {
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// defmt::trace!("Clear all USART interrupts and DMA Read Request");
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// clear all interrupts and DMA Rx Request
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r.cr1().modify(|w| {
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// disable RXNE interrupt
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@ -150,6 +150,16 @@ impl<'d> RingBufferedUartRx<'d> {
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pub async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Error> {
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self.start_dma_or_check_errors()?;
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// In half-duplex mode, we need to disable the Transmitter and enable the Receiver
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// since they can't operate simultaneously on the shared line
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let r = self.info.regs;
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if r.cr3().read().hdsel() && r.cr1().read().te() {
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r.cr1().modify(|reg| {
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reg.set_re(true);
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reg.set_te(false);
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});
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}
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loop {
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match self.ring_buf.read(buf) {
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Ok((0, _)) => {}
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