mirror of
https://github.com/embassy-rs/embassy.git
synced 2025-09-28 21:01:06 +00:00
Merge pull request #4429 from obe1line/obe1line-stm32c071
Updates to support stm32c071
This commit is contained in:
commit
60ed376a19
6
ci.sh
6
ci.sh
@ -102,6 +102,8 @@ cargo batch \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,dual-bank,defmt,exti \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,dual-bank,defmt \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,single-bank,defmt \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c071rb,defmt,exti,time-driver-any,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c051f6,defmt,exti,time-driver-any,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32f038f6,defmt,exti,time-driver-any,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32f030c6,defmt,exti,time-driver-any,time \
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--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32f058t8,defmt,exti,time-driver-any,time \
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@ -303,6 +305,7 @@ cargo batch \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32g491re --artifact-dir out/tests/stm32g491re \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32g071rb --artifact-dir out/tests/stm32g071rb \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c031c6 --artifact-dir out/tests/stm32c031c6 \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c071rb --artifact-dir out/tests/stm32c071rb \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi --artifact-dir out/tests/stm32h755zi \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h753zi --artifact-dir out/tests/stm32h753zi \
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--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h7a3zi --artifact-dir out/tests/stm32h7a3zi \
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@ -382,6 +385,9 @@ rm out/tests/pimoroni-pico-plus-2/pwm
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rm out/tests/rpi-pico/pwm
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rm out/tests/rpi-pico/cyw43-perf
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# tests are implemented but the HIL test farm doesn't actually have this board yet
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rm -rf out/tests/stm32c071rb
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if [[ -z "${TELEPROBE_TOKEN-}" ]]; then
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echo No teleprobe token found, skipping running HIL tests
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exit
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@ -81,7 +81,7 @@ futures-util = { version = "0.3.30", default-features = false }
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sdio-host = "0.9.0"
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critical-section = "1.1"
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#stm32-metapac = { version = "16" }
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-dded8a33a460ae0eb182aee3ccb048beb659982b" }
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9fc86ca7b3a8bc05182bf1ce3045602df1f5dce3" }
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vcell = "0.1.3"
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nb = "1.0.0"
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@ -110,7 +110,7 @@ proc-macro2 = "1.0.36"
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quote = "1.0.15"
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#stm32-metapac = { version = "16", default-features = false, features = ["metadata"]}
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-dded8a33a460ae0eb182aee3ccb048beb659982b", default-features = false, features = ["metadata"] }
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9fc86ca7b3a8bc05182bf1ce3045602df1f5dce3", default-features = false, features = ["metadata"] }
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[features]
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default = ["rt"]
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@ -237,6 +237,47 @@ stm32c031g4 = [ "stm32-metapac/stm32c031g4" ]
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stm32c031g6 = [ "stm32-metapac/stm32c031g6" ]
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stm32c031k4 = [ "stm32-metapac/stm32c031k4" ]
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stm32c031k6 = [ "stm32-metapac/stm32c031k6" ]
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stm32c051c6 = [ "stm32-metapac/stm32c051c6" ]
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stm32c051c8 = [ "stm32-metapac/stm32c051c8" ]
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stm32c051d8 = [ "stm32-metapac/stm32c051d8" ]
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stm32c051f6 = [ "stm32-metapac/stm32c051f6" ]
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stm32c051f8 = [ "stm32-metapac/stm32c051f8" ]
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stm32c051g6 = [ "stm32-metapac/stm32c051g6" ]
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stm32c051g8 = [ "stm32-metapac/stm32c051g8" ]
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stm32c051k6 = [ "stm32-metapac/stm32c051k6" ]
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stm32c051k8 = [ "stm32-metapac/stm32c051k8" ]
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stm32c071c8 = [ "stm32-metapac/stm32c071c8" ]
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stm32c071cb = [ "stm32-metapac/stm32c071cb" ]
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stm32c071f8 = [ "stm32-metapac/stm32c071f8" ]
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stm32c071fb = [ "stm32-metapac/stm32c071fb" ]
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stm32c071g8 = [ "stm32-metapac/stm32c071g8" ]
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stm32c071gb = [ "stm32-metapac/stm32c071gb" ]
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stm32c071k8 = [ "stm32-metapac/stm32c071k8" ]
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stm32c071kb = [ "stm32-metapac/stm32c071kb" ]
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stm32c071r8 = [ "stm32-metapac/stm32c071r8" ]
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stm32c071rb = [ "stm32-metapac/stm32c071rb" ]
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stm32c091cb = [ "stm32-metapac/stm32c091cb" ]
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stm32c091cc = [ "stm32-metapac/stm32c091cc" ]
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stm32c091ec = [ "stm32-metapac/stm32c091ec" ]
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stm32c091fb = [ "stm32-metapac/stm32c091fb" ]
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stm32c091fc = [ "stm32-metapac/stm32c091fc" ]
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stm32c091gb = [ "stm32-metapac/stm32c091gb" ]
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stm32c091gc = [ "stm32-metapac/stm32c091gc" ]
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stm32c091kb = [ "stm32-metapac/stm32c091kb" ]
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stm32c091kc = [ "stm32-metapac/stm32c091kc" ]
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stm32c091rb = [ "stm32-metapac/stm32c091rb" ]
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stm32c091rc = [ "stm32-metapac/stm32c091rc" ]
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stm32c092cb = [ "stm32-metapac/stm32c092cb" ]
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stm32c092cc = [ "stm32-metapac/stm32c092cc" ]
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stm32c092ec = [ "stm32-metapac/stm32c092ec" ]
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stm32c092fb = [ "stm32-metapac/stm32c092fb" ]
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stm32c092fc = [ "stm32-metapac/stm32c092fc" ]
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stm32c092gb = [ "stm32-metapac/stm32c092gb" ]
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stm32c092gc = [ "stm32-metapac/stm32c092gc" ]
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stm32c092kb = [ "stm32-metapac/stm32c092kb" ]
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stm32c092kc = [ "stm32-metapac/stm32c092kc" ]
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stm32c092rb = [ "stm32-metapac/stm32c092rb" ]
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stm32c092rc = [ "stm32-metapac/stm32c092rc" ]
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stm32f030c6 = [ "stm32-metapac/stm32f030c6" ]
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stm32f030c8 = [ "stm32-metapac/stm32f030c8" ]
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stm32f030cc = [ "stm32-metapac/stm32f030cc" ]
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@ -30,19 +30,19 @@ pub(crate) unsafe fn enable_blocking_write() {
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#[cfg(feature = "trustzone-secure")]
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pac::FLASH.seccr().write(|w| {
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w.set_pg(pac::flash::vals::SeccrPg::B_0X1);
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w.set_pg(true);
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});
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#[cfg(not(feature = "trustzone-secure"))]
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pac::FLASH.nscr().write(|w| {
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w.set_pg(pac::flash::vals::NscrPg::B_0X1);
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w.set_pg(true);
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});
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}
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pub(crate) unsafe fn disable_blocking_write() {
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#[cfg(feature = "trustzone-secure")]
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pac::FLASH.seccr().write(|w| w.set_pg(pac::flash::vals::SeccrPg::B_0X0));
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pac::FLASH.seccr().write(|w| w.set_pg(false));
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#[cfg(not(feature = "trustzone-secure"))]
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pac::FLASH.nscr().write(|w| w.set_pg(pac::flash::vals::NscrPg::B_0X0));
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pac::FLASH.nscr().write(|w| w.set_pg(false));
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}
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pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> {
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@ -65,19 +65,19 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E
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w.set_pnb(sector.index_in_bank);
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// TODO: add check for bank swap
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w.set_bker(match sector.bank {
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FlashBank::Bank1 => pac::flash::vals::SeccrBker::B_0X0,
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FlashBank::Bank2 => pac::flash::vals::SeccrBker::B_0X1,
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FlashBank::Bank1 => false,
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FlashBank::Bank2 => true,
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_ => unreachable!(),
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});
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});
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#[cfg(not(feature = "trustzone-secure"))]
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pac::FLASH.nscr().modify(|w| {
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w.set_per(pac::flash::vals::NscrPer::B_0X1);
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w.set_per(true);
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w.set_pnb(sector.index_in_bank);
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// TODO: add check for bank swap
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w.set_bker(match sector.bank {
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FlashBank::Bank1 => pac::flash::vals::NscrBker::B_0X0,
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FlashBank::Bank2 => pac::flash::vals::NscrBker::B_0X1,
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FlashBank::Bank1 => false,
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FlashBank::Bank2 => true,
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_ => unreachable!(),
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});
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});
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@ -93,13 +93,9 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E
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let ret: Result<(), Error> = blocking_wait_ready();
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#[cfg(feature = "trustzone-secure")]
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pac::FLASH
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.seccr()
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.modify(|w| w.set_per(pac::flash::vals::SeccrPer::B_0X0));
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pac::FLASH.seccr().modify(|w| w.set_per(false));
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#[cfg(not(feature = "trustzone-secure"))]
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pac::FLASH
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.nscr()
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.modify(|w| w.set_per(pac::flash::vals::NscrPer::B_0X0));
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pac::FLASH.nscr().modify(|w| w.set_per(false));
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clear_all_err();
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ret
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}
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@ -190,6 +190,8 @@ pub(crate) unsafe fn init(config: Config) {
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// TODO
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lsi: None,
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lse: None,
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#[cfg(crs)]
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hsi48: None,
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);
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RCC.ccipr()
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@ -39,9 +39,9 @@ pub(crate) fn init_hsi48(config: Hsi48Config) -> Hertz {
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});
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// Enable HSI48
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#[cfg(not(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba, stm32f0)))]
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#[cfg(not(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba, stm32f0, stm32c071)))]
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let r = RCC.crrcr();
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#[cfg(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba))]
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#[cfg(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba, stm32c071))]
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let r = RCC.cr();
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#[cfg(any(stm32f0))]
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let r = RCC.cr2();
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@ -74,7 +74,7 @@ macro_rules! impl_peri {
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};
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}
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#[cfg(any(rcc_c0, rcc_g0x0, rcc_g0x1, rcc_u0))]
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#[cfg(any(rcc_c0, rcc_c0v2, rcc_g0x0, rcc_g0x1, rcc_u0))]
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#[allow(unused_imports)]
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use self::{McoSource as Mco1Source, McoSource as Mco2Source};
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@ -7,6 +7,7 @@ autobins = false
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[features]
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stm32c031c6 = ["embassy-stm32/stm32c031c6", "cm0", "not-gpdma"]
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stm32c071rb = ["embassy-stm32/stm32c071rb", "cm0", "not-gpdma"]
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stm32f103c8 = ["embassy-stm32/stm32f103c8", "spi-v1", "not-gpdma"]
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stm32f207zg = ["embassy-stm32/stm32f207zg", "spi-v1", "chrono", "not-gpdma", "eth", "rng"]
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stm32f303ze = ["embassy-stm32/stm32f303ze", "chrono", "not-gpdma"]
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@ -12,6 +12,7 @@ fn main() -> Result<(), Box<dyn Error>> {
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// too little RAM to run from RAM.
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feature = "stm32f103c8", // 20 kb
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feature = "stm32c031c6", // 6 kb
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feature = "stm32c071rb", // 24 kb
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feature = "stm32l073rz", // 20 kb
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feature = "stm32h503rb", // 32 kb
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// no VTOR, so interrupts can't work when running from RAM
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@ -34,6 +34,8 @@ teleprobe_meta::target!(b"nucleo-stm32u5a5zj");
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teleprobe_meta::target!(b"nucleo-stm32h563zi");
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#[cfg(feature = "stm32c031c6")]
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teleprobe_meta::target!(b"nucleo-stm32c031c6");
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#[cfg(feature = "stm32c071rb")]
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teleprobe_meta::target!(b"nucleo-stm32c071rb");
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#[cfg(feature = "stm32l073rz")]
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teleprobe_meta::target!(b"nucleo-stm32l073rz");
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#[cfg(feature = "stm32l152re")]
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@ -186,6 +188,12 @@ define_peris!(
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SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
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@irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
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);
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#[cfg(feature = "stm32c071rb")]
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define_peris!(
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UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
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SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
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@irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
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);
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#[cfg(feature = "stm32l496zg")]
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define_peris!(
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UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3,
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@ -271,7 +279,7 @@ pub fn config() -> Config {
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#[allow(unused_mut)]
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let mut config = Config::default();
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#[cfg(feature = "stm32c031c6")]
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#[cfg(any(feature = "stm32c031c6", feature = "stm32c071rb"))]
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{
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config.rcc.hsi = Some(Hsi {
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sys_div: HsiSysDiv::DIV1, // 48Mhz
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