Merge pull request #4429 from obe1line/obe1line-stm32c071

Updates to support stm32c071
This commit is contained in:
Dario Nieuwenhuis 2025-07-23 10:25:57 +00:00 committed by GitHub
commit 60ed376a19
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GPG Key ID: B5690EEEBB952194
9 changed files with 76 additions and 21 deletions

6
ci.sh
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@ -102,6 +102,8 @@ cargo batch \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,dual-bank,defmt,exti \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,dual-bank,defmt \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,single-bank,defmt \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c071rb,defmt,exti,time-driver-any,time \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c051f6,defmt,exti,time-driver-any,time \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32f038f6,defmt,exti,time-driver-any,time \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32f030c6,defmt,exti,time-driver-any,time \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32f058t8,defmt,exti,time-driver-any,time \
@ -303,6 +305,7 @@ cargo batch \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32g491re --artifact-dir out/tests/stm32g491re \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32g071rb --artifact-dir out/tests/stm32g071rb \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c031c6 --artifact-dir out/tests/stm32c031c6 \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c071rb --artifact-dir out/tests/stm32c071rb \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi --artifact-dir out/tests/stm32h755zi \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h753zi --artifact-dir out/tests/stm32h753zi \
--- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h7a3zi --artifact-dir out/tests/stm32h7a3zi \
@ -382,6 +385,9 @@ rm out/tests/pimoroni-pico-plus-2/pwm
rm out/tests/rpi-pico/pwm
rm out/tests/rpi-pico/cyw43-perf
# tests are implemented but the HIL test farm doesn't actually have this board yet
rm -rf out/tests/stm32c071rb
if [[ -z "${TELEPROBE_TOKEN-}" ]]; then
echo No teleprobe token found, skipping running HIL tests
exit

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@ -81,7 +81,7 @@ futures-util = { version = "0.3.30", default-features = false }
sdio-host = "0.9.0"
critical-section = "1.1"
#stm32-metapac = { version = "16" }
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-dded8a33a460ae0eb182aee3ccb048beb659982b" }
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9fc86ca7b3a8bc05182bf1ce3045602df1f5dce3" }
vcell = "0.1.3"
nb = "1.0.0"
@ -110,7 +110,7 @@ proc-macro2 = "1.0.36"
quote = "1.0.15"
#stm32-metapac = { version = "16", default-features = false, features = ["metadata"]}
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-dded8a33a460ae0eb182aee3ccb048beb659982b", default-features = false, features = ["metadata"] }
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9fc86ca7b3a8bc05182bf1ce3045602df1f5dce3", default-features = false, features = ["metadata"] }
[features]
default = ["rt"]
@ -237,6 +237,47 @@ stm32c031g4 = [ "stm32-metapac/stm32c031g4" ]
stm32c031g6 = [ "stm32-metapac/stm32c031g6" ]
stm32c031k4 = [ "stm32-metapac/stm32c031k4" ]
stm32c031k6 = [ "stm32-metapac/stm32c031k6" ]
stm32c051c6 = [ "stm32-metapac/stm32c051c6" ]
stm32c051c8 = [ "stm32-metapac/stm32c051c8" ]
stm32c051d8 = [ "stm32-metapac/stm32c051d8" ]
stm32c051f6 = [ "stm32-metapac/stm32c051f6" ]
stm32c051f8 = [ "stm32-metapac/stm32c051f8" ]
stm32c051g6 = [ "stm32-metapac/stm32c051g6" ]
stm32c051g8 = [ "stm32-metapac/stm32c051g8" ]
stm32c051k6 = [ "stm32-metapac/stm32c051k6" ]
stm32c051k8 = [ "stm32-metapac/stm32c051k8" ]
stm32c071c8 = [ "stm32-metapac/stm32c071c8" ]
stm32c071cb = [ "stm32-metapac/stm32c071cb" ]
stm32c071f8 = [ "stm32-metapac/stm32c071f8" ]
stm32c071fb = [ "stm32-metapac/stm32c071fb" ]
stm32c071g8 = [ "stm32-metapac/stm32c071g8" ]
stm32c071gb = [ "stm32-metapac/stm32c071gb" ]
stm32c071k8 = [ "stm32-metapac/stm32c071k8" ]
stm32c071kb = [ "stm32-metapac/stm32c071kb" ]
stm32c071r8 = [ "stm32-metapac/stm32c071r8" ]
stm32c071rb = [ "stm32-metapac/stm32c071rb" ]
stm32c091cb = [ "stm32-metapac/stm32c091cb" ]
stm32c091cc = [ "stm32-metapac/stm32c091cc" ]
stm32c091ec = [ "stm32-metapac/stm32c091ec" ]
stm32c091fb = [ "stm32-metapac/stm32c091fb" ]
stm32c091fc = [ "stm32-metapac/stm32c091fc" ]
stm32c091gb = [ "stm32-metapac/stm32c091gb" ]
stm32c091gc = [ "stm32-metapac/stm32c091gc" ]
stm32c091kb = [ "stm32-metapac/stm32c091kb" ]
stm32c091kc = [ "stm32-metapac/stm32c091kc" ]
stm32c091rb = [ "stm32-metapac/stm32c091rb" ]
stm32c091rc = [ "stm32-metapac/stm32c091rc" ]
stm32c092cb = [ "stm32-metapac/stm32c092cb" ]
stm32c092cc = [ "stm32-metapac/stm32c092cc" ]
stm32c092ec = [ "stm32-metapac/stm32c092ec" ]
stm32c092fb = [ "stm32-metapac/stm32c092fb" ]
stm32c092fc = [ "stm32-metapac/stm32c092fc" ]
stm32c092gb = [ "stm32-metapac/stm32c092gb" ]
stm32c092gc = [ "stm32-metapac/stm32c092gc" ]
stm32c092kb = [ "stm32-metapac/stm32c092kb" ]
stm32c092kc = [ "stm32-metapac/stm32c092kc" ]
stm32c092rb = [ "stm32-metapac/stm32c092rb" ]
stm32c092rc = [ "stm32-metapac/stm32c092rc" ]
stm32f030c6 = [ "stm32-metapac/stm32f030c6" ]
stm32f030c8 = [ "stm32-metapac/stm32f030c8" ]
stm32f030cc = [ "stm32-metapac/stm32f030cc" ]

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@ -30,19 +30,19 @@ pub(crate) unsafe fn enable_blocking_write() {
#[cfg(feature = "trustzone-secure")]
pac::FLASH.seccr().write(|w| {
w.set_pg(pac::flash::vals::SeccrPg::B_0X1);
w.set_pg(true);
});
#[cfg(not(feature = "trustzone-secure"))]
pac::FLASH.nscr().write(|w| {
w.set_pg(pac::flash::vals::NscrPg::B_0X1);
w.set_pg(true);
});
}
pub(crate) unsafe fn disable_blocking_write() {
#[cfg(feature = "trustzone-secure")]
pac::FLASH.seccr().write(|w| w.set_pg(pac::flash::vals::SeccrPg::B_0X0));
pac::FLASH.seccr().write(|w| w.set_pg(false));
#[cfg(not(feature = "trustzone-secure"))]
pac::FLASH.nscr().write(|w| w.set_pg(pac::flash::vals::NscrPg::B_0X0));
pac::FLASH.nscr().write(|w| w.set_pg(false));
}
pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> {
@ -65,19 +65,19 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E
w.set_pnb(sector.index_in_bank);
// TODO: add check for bank swap
w.set_bker(match sector.bank {
FlashBank::Bank1 => pac::flash::vals::SeccrBker::B_0X0,
FlashBank::Bank2 => pac::flash::vals::SeccrBker::B_0X1,
FlashBank::Bank1 => false,
FlashBank::Bank2 => true,
_ => unreachable!(),
});
});
#[cfg(not(feature = "trustzone-secure"))]
pac::FLASH.nscr().modify(|w| {
w.set_per(pac::flash::vals::NscrPer::B_0X1);
w.set_per(true);
w.set_pnb(sector.index_in_bank);
// TODO: add check for bank swap
w.set_bker(match sector.bank {
FlashBank::Bank1 => pac::flash::vals::NscrBker::B_0X0,
FlashBank::Bank2 => pac::flash::vals::NscrBker::B_0X1,
FlashBank::Bank1 => false,
FlashBank::Bank2 => true,
_ => unreachable!(),
});
});
@ -93,13 +93,9 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E
let ret: Result<(), Error> = blocking_wait_ready();
#[cfg(feature = "trustzone-secure")]
pac::FLASH
.seccr()
.modify(|w| w.set_per(pac::flash::vals::SeccrPer::B_0X0));
pac::FLASH.seccr().modify(|w| w.set_per(false));
#[cfg(not(feature = "trustzone-secure"))]
pac::FLASH
.nscr()
.modify(|w| w.set_per(pac::flash::vals::NscrPer::B_0X0));
pac::FLASH.nscr().modify(|w| w.set_per(false));
clear_all_err();
ret
}

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@ -190,6 +190,8 @@ pub(crate) unsafe fn init(config: Config) {
// TODO
lsi: None,
lse: None,
#[cfg(crs)]
hsi48: None,
);
RCC.ccipr()

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@ -39,9 +39,9 @@ pub(crate) fn init_hsi48(config: Hsi48Config) -> Hertz {
});
// Enable HSI48
#[cfg(not(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba, stm32f0)))]
#[cfg(not(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba, stm32f0, stm32c071)))]
let r = RCC.crrcr();
#[cfg(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba))]
#[cfg(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba, stm32c071))]
let r = RCC.cr();
#[cfg(any(stm32f0))]
let r = RCC.cr2();

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@ -74,7 +74,7 @@ macro_rules! impl_peri {
};
}
#[cfg(any(rcc_c0, rcc_g0x0, rcc_g0x1, rcc_u0))]
#[cfg(any(rcc_c0, rcc_c0v2, rcc_g0x0, rcc_g0x1, rcc_u0))]
#[allow(unused_imports)]
use self::{McoSource as Mco1Source, McoSource as Mco2Source};

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@ -7,6 +7,7 @@ autobins = false
[features]
stm32c031c6 = ["embassy-stm32/stm32c031c6", "cm0", "not-gpdma"]
stm32c071rb = ["embassy-stm32/stm32c071rb", "cm0", "not-gpdma"]
stm32f103c8 = ["embassy-stm32/stm32f103c8", "spi-v1", "not-gpdma"]
stm32f207zg = ["embassy-stm32/stm32f207zg", "spi-v1", "chrono", "not-gpdma", "eth", "rng"]
stm32f303ze = ["embassy-stm32/stm32f303ze", "chrono", "not-gpdma"]

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@ -12,6 +12,7 @@ fn main() -> Result<(), Box<dyn Error>> {
// too little RAM to run from RAM.
feature = "stm32f103c8", // 20 kb
feature = "stm32c031c6", // 6 kb
feature = "stm32c071rb", // 24 kb
feature = "stm32l073rz", // 20 kb
feature = "stm32h503rb", // 32 kb
// no VTOR, so interrupts can't work when running from RAM

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@ -34,6 +34,8 @@ teleprobe_meta::target!(b"nucleo-stm32u5a5zj");
teleprobe_meta::target!(b"nucleo-stm32h563zi");
#[cfg(feature = "stm32c031c6")]
teleprobe_meta::target!(b"nucleo-stm32c031c6");
#[cfg(feature = "stm32c071rb")]
teleprobe_meta::target!(b"nucleo-stm32c071rb");
#[cfg(feature = "stm32l073rz")]
teleprobe_meta::target!(b"nucleo-stm32l073rz");
#[cfg(feature = "stm32l152re")]
@ -186,6 +188,12 @@ define_peris!(
SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
@irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
);
#[cfg(feature = "stm32c071rb")]
define_peris!(
UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
@irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
);
#[cfg(feature = "stm32l496zg")]
define_peris!(
UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3,
@ -271,7 +279,7 @@ pub fn config() -> Config {
#[allow(unused_mut)]
let mut config = Config::default();
#[cfg(feature = "stm32c031c6")]
#[cfg(any(feature = "stm32c031c6", feature = "stm32c071rb"))]
{
config.rcc.hsi = Some(Hsi {
sys_div: HsiSysDiv::DIV1, // 48Mhz