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Add STM32WBA65RI NUCLEO board to HIL test bench

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Add HIL test support for the NUCLEO-WBA65RI board with UART loopback
(LPUART1: PB11 TX, PA10 RX) and SPI loopback (SPI2: PB10 SCK, PC3
MOSI, PA9 MISO). Uses HSI at 16 MHz.

Wiring (Arduino header):
- UART loopback: D9 (PB11) <-> D8 (PA10)
- SPI loopback: D11 (PC3) <-> D12 (PA9)

Tests excluded from CI until board is on the HIL shelf.
This commit is contained in:
Gerzain Mata
2026-03-04 16:35:36 -07:00
committed by Dario Nieuwenhuis
parent 462644a91b
commit 87bb1b092d
4 changed files with 24 additions and 0 deletions
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1
ci.sh
View File

@@ -74,6 +74,7 @@ rm out/tests/stm32h563zi/usart_dma
rm -rf out/tests/stm32c071rb
rm -rf out/tests/stm32f100rd
rm -rf out/tests/stm32f107vc
rm -rf out/tests/stm32wba65ri
if [[ -z "${TELEPROBE_TOKEN-}" ]]; then
echo No teleprobe token found, skipping running HIL tests

2
tests/stm32/Cargo.toml
View File

@@ -33,6 +33,7 @@ stm32u585ai = ["embassy-stm32/stm32u585ai", "spi-v345", "chrono", "rng", "hash",
stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "spi-v345", "chrono", "rng", "hash"] # FIXME: cordic test cause it crash
stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng", "hsem", "stop"]
stm32wba52cg = ["embassy-stm32/stm32wba52cg", "spi-v345", "chrono", "rng", "hash", "adc"]
stm32wba65ri = ["embassy-stm32/stm32wba65ri", "spi-v345", "chrono", "rng", "hash", "adc"]
stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono", "hsem", "stop"]
stm32f091rc = ["embassy-stm32/stm32f091rc", "cm0", "not-gpdma", "chrono"]
stm32h503rb = ["embassy-stm32/stm32h503rb", "spi-v345", "rng", "stop"]
@@ -285,6 +286,7 @@ build = [
{ target = "thumbv8m.main-none-eabihf", features = ["stm32u585ai"], artifact-dir = "out/tests/stm32u585ai" },
{ target = "thumbv8m.main-none-eabihf", features = ["stm32u5a5zj"], artifact-dir = "out/tests/stm32u5a5zj" },
{ target = "thumbv8m.main-none-eabihf", features = ["stm32wba52cg"], artifact-dir = "out/tests/stm32wba52cg" },
{ target = "thumbv8m.main-none-eabihf", features = ["stm32wba65ri"], artifact-dir = "out/tests/stm32wba65ri" },
{ target = "thumbv6m-none-eabi", features = ["stm32l073rz"], artifact-dir = "out/tests/stm32l073rz" },
{ target = "thumbv7m-none-eabi", features = ["stm32l152re"], artifact-dir = "out/tests/stm32l152re" },
{ target = "thumbv7em-none-eabi", features = ["stm32l4a6zg"], artifact-dir = "out/tests/stm32l4a6zg" },

1
tests/stm32/src/bin/hash.rs
View File

@@ -22,6 +22,7 @@ bind_interrupts!(struct Irqs {
#[cfg(any(
feature = "stm32wba52cg",
feature = "stm32wba65ri",
feature = "stm32l552ze",
feature = "stm32h563zi",
feature = "stm32h503rb",

20
tests/stm32/src/common.rs
View File

@@ -58,6 +58,8 @@ teleprobe_meta::target!(b"nucleo-stm32l496zg");
teleprobe_meta::target!(b"nucleo-stm32wl55jc");
#[cfg(feature = "stm32wba52cg")]
teleprobe_meta::target!(b"nucleo-stm32wba52cg");
#[cfg(feature = "stm32wba65ri")]
teleprobe_meta::target!(b"nucleo-stm32wba65ri");
#[cfg(feature = "stm32f091rc")]
teleprobe_meta::target!(b"nucleo-stm32f091rc");
#[cfg(feature = "stm32h503rb")]
@@ -393,6 +395,17 @@ define_peris!(
GPDMA1_CHANNEL1 => embassy_stm32::dma::InterruptHandler<embassy_stm32::peripherals::GPDMA1_CH1>;
},
);
#[cfg(feature = "stm32wba65ri")]
define_peris!(
UART = LPUART1, UART_TX = PB11, UART_RX = PA10, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1,
SPI = SPI2, SPI_SCK = PB10, SPI_MOSI = PC3, SPI_MISO = PA9, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1,
ADC = ADC4, DAC_PIN = PA0,
@irq UART = {
LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;
GPDMA1_CHANNEL0 => embassy_stm32::dma::InterruptHandler<embassy_stm32::peripherals::GPDMA1_CH0>;
GPDMA1_CHANNEL1 => embassy_stm32::dma::InterruptHandler<embassy_stm32::peripherals::GPDMA1_CH1>;
},
);
#[cfg(feature = "stm32h7s3l8")]
define_peris!(
CRYP_IN_DMA = GPDMA1_CH0, CRYP_OUT_DMA = GPDMA1_CH1,
@@ -790,6 +803,13 @@ pub fn config() -> Config {
config.rcc.mux.rngsel = mux::Rngsel::HSI;
}
#[cfg(feature = "stm32wba65ri")]
{
config.rcc.sys = Sysclk::HSI;
config.rcc.mux.rngsel = mux::Rngsel::HSI;
config.rcc.mux.sai1sel = mux::Sai1sel::HSI;
}
#[cfg(feature = "stm32l073rz")]
{
config.rcc.hsi = true;