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Set the alternate bytes register to the correct value when configuring an Ospi command

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This commit is contained in:
Brian Schwind 2025-09-12 20:02:33 +09:00
parent a7e1bf2aff
commit 9c4df75940
1 changed files with 5 additions and 6 deletions
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11
embassy-stm32/src/ospi/mod.rs
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@ -451,11 +451,6 @@ impl<'d, T: Instance, M: PeriMode> Ospi<'d, T, M> {
// Configure alternate bytes
if let Some(ab) = command.alternate_bytes {
T::REGS.abr().write(|v| v.set_alternate(ab));
T::REGS.ccr().modify(|w| {
w.set_abmode(PhaseMode::from_bits(command.abwidth.into()));
w.set_abdtr(command.abdtr);
w.set_absize(SizeInBits::from_bits(command.absize.into()));
})
}
// Configure dummy cycles
@ -474,7 +469,7 @@ impl<'d, T: Instance, M: PeriMode> Ospi<'d, T, M> {
});
}
// Configure instruction/address/data/communication modes
// Configure instruction/address/alternate bytes/data/communication modes
T::REGS.ccr().modify(|w| {
w.set_imode(PhaseMode::from_bits(command.iwidth.into()));
w.set_idtr(command.idtr);
@ -484,6 +479,10 @@ impl<'d, T: Instance, M: PeriMode> Ospi<'d, T, M> {
w.set_addtr(command.addtr);
w.set_adsize(SizeInBits::from_bits(command.adsize.into()));
w.set_abmode(PhaseMode::from_bits(command.abwidth.into()));
w.set_abdtr(command.abdtr);
w.set_absize(SizeInBits::from_bits(command.absize.into()));
w.set_dmode(PhaseMode::from_bits(command.dwidth.into()));
w.set_ddtr(command.ddtr);