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Merge pull request #4056 from embassy-rs/f1-enable-adc-irq

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stm32/adc: enable interrupt for stm32f1
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Dario Nieuwenhuis 2025-04-06 23:36:54 +00:00 committed by GitHub
commit 9d83955fd5
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1 changed files with 8 additions and 6 deletions
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14
embassy-stm32/src/adc/f1.rs
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@ -4,8 +4,10 @@ use core::task::Poll;
use super::blocking_delay_us; use super::blocking_delay_us;
use crate::adc::{Adc, AdcChannel, Instance, SampleTime}; use crate::adc::{Adc, AdcChannel, Instance, SampleTime};
use crate::interrupt::typelevel::Interrupt;
use crate::interrupt::{self};
use crate::time::Hertz; use crate::time::Hertz;
use crate::{interrupt, rcc, Peri}; use crate::{rcc, Peri};
pub const VDDA_CALIB_MV: u32 = 3300; pub const VDDA_CALIB_MV: u32 = 3300;
pub const ADC_MAX: u32 = (1 << 12) - 1; pub const ADC_MAX: u32 = (1 << 12) - 1;
@ -20,14 +22,11 @@ pub struct InterruptHandler<T: Instance> {
impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> { impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
unsafe fn on_interrupt() { unsafe fn on_interrupt() {
if T::regs().sr().read().eoc() { if T::regs().sr().read().eoc() {
T::regs().cr1().modify(|w| w.set_eocie(false)); T::regs().cr1().modify(|w| w.set_eocie(false)); // End of Convert interrupt disable
} else {
return;
}
T::state().waker.wake(); T::state().waker.wake();
} }
} }
}
pub struct Vref; pub struct Vref;
impl<T: Instance> AdcChannel<T> for Vref {} impl<T: Instance> AdcChannel<T> for Vref {}
@ -69,6 +68,9 @@ impl<'d, T: Instance> Adc<'d, T> {
// One cycle after calibration // One cycle after calibration
blocking_delay_us((1_000_000 * 1) / Self::freq().0 + 1); blocking_delay_us((1_000_000 * 1) / Self::freq().0 + 1);
T::Interrupt::unpend();
unsafe { T::Interrupt::enable() };
Self { Self {
adc, adc,
sample_time: SampleTime::from_bits(0), sample_time: SampleTime::from_bits(0),