Thor McAvenia
241129c569
Add PioI2sIn, PioI2sInProgram, and example binary
2025-09-05 21:01:37 +02:00
Dario Nieuwenhuis
bbcf9af87e
Merge pull request #4639 from embassy-rs/rp-pio-spi
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rp: add PIO SPI
2025-09-05 19:00:01 +00:00
Adrian Wowk
815ba8aa75
rp: read pio gpiobase in set_pins and set_pin_dirs
2025-09-05 20:41:07 +02:00
Adrian Wowk
5137306575
rp: move pio pin configs after set_config
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This is needed for the program to work correctly on rp235xb when using
the higher pin numbers.
2025-09-05 20:35:48 +02:00
Adrian Wowk
451625ff55
rp: fix pio spi async example
2025-09-05 20:35:48 +02:00
Adrian Wowk
62ff0194f4
rp: add pio spi runtime reconfiguration
2025-09-05 20:35:48 +02:00
Adrian Wowk
83b42e0db6
style: cleanup with rustfmt
2025-09-05 20:35:48 +02:00
Adrian Wowk
236662c748
rp: add pio spi examples
2025-09-05 20:35:48 +02:00
Adrian Wowk
4cac3ac1d2
rp: add new pio spi program
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This commit adds a new PIO program which implements SPI. This allows
you to drive more than 2 SPI buses by using PIO state machines as
additional duplex SPI interfaces.
The driver supports both blocking and async modes of operation and
exclusively uses the DMA for async IO.
2025-09-05 20:35:48 +02:00
Adrian Wowk
676f9da583
rp: add new pio dma apis
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This commit adds StateMachineRx::dma_pull_repeated and
StateMachineTx::dma_push_repeated which allow you to discard reads or
send dummy writes to the state machine using the DMA hardware
2025-09-05 20:35:48 +02:00
Dario Nieuwenhuis
0407f7ebe8
Merge pull request #4613 from felipebalbi/embassy-usb-transfer-helper
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feat: add helper to read/write full transfer blocks
2025-09-05 15:01:12 +00:00
Dario Nieuwenhuis
bd9bb7b9e8
Merge pull request #4566 from mkj/pr/otg-rx
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otg: Use chunks_exact for more efficient rx copy
2025-09-05 16:56:35 +02:00
Dario Nieuwenhuis
6438068c16
Merge pull request #4368 from nikvoid/stm32-complementary-pwm-dma
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stm32: add `waveform_up` function for complementary PWM too
2025-09-05 16:56:18 +02:00
Dario Nieuwenhuis
4b27444e1c
Merge pull request #4359 from cbaechler/fix/stm32-l0-temperature-channel
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embassy-stm32: Fix temperature ADC channel for STM32L0 series
2025-09-05 16:56:07 +02:00
Dario Nieuwenhuis
84f2254332
Merge pull request #4638 from embassy-rs/octospi
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stm32: OSPI ram support
2025-09-05 16:55:56 +02:00
Matt Johnston
cac3964252
otg: Use chunks_exact for more efficient rx copy
2025-09-05 16:35:54 +02:00
Matt Johnston
bc448985d5
otg: Simplify chunks_exact for tx
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The last chunk doesn't need to be created first, instead borrow the
iterator so it can be used later for the remainder.
2025-09-05 16:35:54 +02:00
jake-taf
525c7fe1eb
OSPI RAM Support
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- Make DQSE / SIOO configurable
- Make write instruction configurable
- Fix bug where the address DTR was using the config for the instruction DTR instead of its own
- Configure DQS pin
2025-09-05 16:34:17 +02:00
Dario Nieuwenhuis
4ac4452c16
Merge pull request #4599 from universalhandle/4577-dropped-channel-disables-dac
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fix(embassy-stm32): Prevent dropped DacChannel from disabling Dac peripheral if another DacChannel is still in scope
2025-09-05 16:28:53 +02:00
Francisco José Gómez
46ce5ab697
chore(embassy-stm32): Update changelog
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Refs: #4577
2025-09-05 16:28:40 +02:00
Francisco José Gómez
d264c8ab31
fix(embassy-stm32): Prevent dropped DacChannel from disabling Dac peripheral if another DacChannel is still in scope
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Fix #4577 by counting references to DacChannel. Modeled after similar code in the `can` module.
2025-09-05 16:28:40 +02:00
Dario Nieuwenhuis
b8577a3133
Use merge=union for changelogs to avoid constant conflicts.
2025-09-05 16:27:48 +02:00
Dario Nieuwenhuis
1c2fa92293
Merge pull request #4620 from embassy-rs/lolsai
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stm32: add i2s support for all versions, cleanup spi/i2s/sai versions.
2025-09-05 14:13:10 +00:00
Dario Nieuwenhuis
683ca6595f
stm32/spi: update for new version numbering, add i2s support for all versions.
2025-09-05 16:01:29 +02:00
Dario Nieuwenhuis
581594d1f5
Merge pull request #4496 from variegated-coffee/psram
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feat(embassy-rp): RP2350 - Add support for QMI CS1, and for APS6404L PSRAM
2025-09-05 13:45:00 +00:00
Dario Nieuwenhuis
9c30be254c
Merge pull request #4586 from per42/adc_with_clock
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Add Adc::new_with_clock() to configure analog clock
2025-09-05 15:29:34 +02:00
Dario Nieuwenhuis
704c294162
Merge branch 'main' into adc_with_clock
2025-09-05 15:29:20 +02:00
Dario Nieuwenhuis
90d403fd0a
stm32: peri_v1_bar now enables cfgs peri_v1 and peri_v1_bar.
2025-09-05 15:19:22 +02:00
Dario Nieuwenhuis
60b640bd97
stm32/sai: update for new metapac, simplify cfgs.
2025-09-05 15:19:22 +02:00
Dario Nieuwenhuis
f6414d8cd2
Merge pull request #3923 from elagil/gpdma_ll_ringbuf_support
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Add GPDMA linked-list + ringbuffer support
2025-09-05 13:07:48 +00:00
Dario Nieuwenhuis
fbe2c0d43b
Merge pull request #4637 from embassy-rs/executor-fix-main-name
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executor: always name main task `main`, not just with rtos-trace.
2025-09-05 13:06:36 +00:00
Dario Nieuwenhuis
286d887529
executor: always name main task main
, not just with rtos-trace.
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Also fixes the warning about the `rtos-trace` feature not existing in embassy-executor-macros.
2025-09-05 14:57:05 +02:00
Adrian Figueroa
2e2562d8dc
fix: ping-pong helper DMA direction
2025-09-05 14:43:43 +02:00
Adrian Figueroa
c487034dc7
style: formatting
2025-09-05 14:43:43 +02:00
Adrian Figueroa
1e54841632
chore: add changelog entry
2025-09-05 14:43:43 +02:00
Adrian Figueroa
40eb557682
feat: SAI example
2025-09-05 14:43:29 +02:00
elagil
1e627cab29
refactor: make dma implementations match in interface
2025-09-05 14:43:29 +02:00
elagil
db7828538f
fix: consolidate naming
2025-09-05 14:43:29 +02:00
elagil
e9783ee28e
fix: build
2025-09-05 14:43:29 +02:00
etiennecollin
d3718c6d4e
fix: renamed simple table as per ST nomenclature
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Co-authored-by: elagil <elagil@takanome.de>
2025-09-05 14:43:29 +02:00
etiennecollin
51e7fafc3c
fix: removed unnecessary mut reference
2025-09-05 14:43:29 +02:00
etiennecollin
47bb14514f
feat: use register wrappers instead of u32 for LinearItem
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Since the register structs are no-field structs with
`repr(transparent)`, we can use them in the LinearItem with `repr(C)`.
This allows the user to call the convenient named setter functions for
the registers instead of manually changing the bits of the u32.
2025-09-05 14:43:29 +02:00
etiennecollin
50e2e2ec60
feat: add new_with_table() initializer for ring-buffers and removal of RegisterUpdaters
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- It is now possible to pass a linked-list table to the ring-buffer with
the `new_with_table()` function or use the `new()` function for a basic
ring-buffer setup.
- A `simple_ring_buffer_table()` function was added to the read and
write ring-buffers to generate the same table as the one created by
`new()` in case the user only wants to customize the default table
options.
- RegisterUpdaters have been removed as the user now has direct access
to the table and its items if needed.
See: https://github.com/elagil/embassy/pull/1#issuecomment-2891997294
2025-09-05 14:43:29 +02:00
etiennecollin
4291a092be
fix: moved channel configuration from new() to start()
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See this PR comment explaining why configuration in `new()` is a bad
idea:
https://github.com/embassy-rs/embassy/pull/3923#issuecomment-2889193736
2025-09-05 14:43:29 +02:00
etiennecollin
a2daa9739f
fix: removed functions exposing channel registers
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These functions could be used to cause UB.
2025-09-05 14:43:29 +02:00
etiennecollin
2f24568de0
feat: custom dma configuration using RegisterUpdaters struct
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See this PR comment:
https://github.com/embassy-rs/embassy/pull/3923#issuecomment-2889283939
2025-09-05 14:43:29 +02:00
etiennecollin
f67365a067
fix: suspend before reset
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This follows the procedure outlined in the STM32U5 reference manual at
page 696.
2025-09-05 14:43:29 +02:00
etiennecollin
4999069198
feat: use provided TransferOptions instead of defaults
2025-09-05 14:43:29 +02:00
etiennecollin
277c59857b
feat: custom DMA channel configuration
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See
https://github.com/embassy-rs/embassy/pull/3923#issuecomment-2888810087
The default configuration of the channel which was done in `start()` is
now done in `new()` this allows overriding some settings through the new
`get_dma_channel` function. Only ringbuffers support this;
`LinkedListTransfer` and `Transfer` do not support that yet.
2025-09-05 14:43:29 +02:00
etiennecollin
c0b8e9c7e5
fix: writing reserved bits
2025-09-05 14:43:29 +02:00