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https://github.com/esp-rs/esp-hal.git
synced 2025-09-28 04:40:52 +00:00
Support atomic emulation for ESP32C3 if needed
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@ -11,14 +11,15 @@ repository = "https://github.com/esp-rs/esp-hal"
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license = "MIT OR Apache-2.0"
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[dependencies]
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embedded-hal = { version = "0.2", features = ["unproven"] }
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nb = "1.0"
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paste = "1.0"
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riscv = { version = "0.7", optional = true }
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void = { version = "1.0", default-features = false }
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xtensa-lx = { version = "0.6.0", optional = true }
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xtensa-lx-rt = { version = "0.9.0", optional = true }
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procmacros = { path = "../esp-hal-procmacros", package = "esp-hal-procmacros" }
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embedded-hal = { version = "0.2", features = ["unproven"] }
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nb = "1.0"
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paste = "1.0"
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riscv = { version = "0.7", optional = true }
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riscv-atomic-emulation-trap = { version = "0.1.0", optional = true }
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void = { version = "1.0", default-features = false }
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xtensa-lx = { version = "0.6.0", optional = true }
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xtensa-lx-rt = { version = "0.9.0", optional = true }
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procmacros = { path = "../esp-hal-procmacros", package = "esp-hal-procmacros" }
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# IMPORTANT:
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# Each supported device MUST have its PAC included below along with a
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# corresponding feature.
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@ -29,7 +30,7 @@ esp32s3_pac = { package = "esp32s3", git = "https://github.com/esp-rs/esp-pacs.g
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[features]
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esp32 = ["esp32_pac", "esp32_pac/rt", "xtensa-lx/esp32", "xtensa-lx-rt/esp32", "procmacros/rtc_slow", "dual_core"]
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esp32c3 = ["esp32c3_pac", "esp32c3_pac/rt", "riscv", "single_core"]
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esp32c3 = ["esp32c3_pac", "esp32c3_pac/rt", "riscv", "riscv-atomic-emulation-trap", "single_core"]
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esp32s2 = ["esp32s2_pac", "esp32s2_pac/rt", "xtensa-lx/esp32", "xtensa-lx-rt/esp32s2", "procmacros/rtc_slow", "single_core"]
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esp32s3 = ["esp32s3_pac", "esp32s3_pac/rt", "xtensa-lx/esp32", "xtensa-lx-rt/esp32s3", "procmacros/rtc_slow", "dual_core"]
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@ -187,7 +187,6 @@ pub fn get_status(_core: Cpu) -> u128 {
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}
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}
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// TODO should this be aligned with Atomic Emulation Trap Handler in future?
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/// Registers saved in trap handler
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#[doc(hidden)]
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#[allow(missing_docs)]
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@ -235,14 +234,12 @@ pub struct TrapFrame {
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#[export_name = "_start_trap_rust_hal"]
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pub unsafe extern "C" fn start_trap_rust_hal(trap_frame: *mut TrapFrame) {
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extern "C" {
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pub fn _start_trap_rust(trap_frame: *const TrapFrame);
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pub fn DefaultHandler();
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}
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let cause = mcause::read();
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if cause.is_exception() {
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_start_trap_rust(trap_frame);
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handle_exception(trap_frame);
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} else {
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let code = riscv::register::mcause::read().code();
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match code {
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@ -282,6 +279,89 @@ pub unsafe extern "C" fn start_trap_rust_hal(trap_frame: *mut TrapFrame) {
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}
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}
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/// Apply atomic emulation if needed. Call the default exception handler
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/// otherwise.
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///
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/// # Safety
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///
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/// This function is called from an trap handler.
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#[doc(hidden)]
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unsafe fn handle_exception(trap_frame: *mut TrapFrame) {
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extern "C" {
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pub fn _start_trap_atomic_rust(trap_frame: *mut riscv_atomic_emulation_trap::TrapFrame);
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}
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let mut atomic_emulation_trap_frame = riscv_atomic_emulation_trap::TrapFrame {
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pc: riscv::register::mepc::read(),
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ra: (*trap_frame).ra,
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sp: (*trap_frame).sp,
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gp: (*trap_frame).gp,
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tp: (*trap_frame).tp,
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t0: (*trap_frame).t0,
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t1: (*trap_frame).t1,
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t2: (*trap_frame).t2,
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fp: (*trap_frame).s0,
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s1: (*trap_frame).s1,
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a0: (*trap_frame).a0,
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a1: (*trap_frame).a1,
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a2: (*trap_frame).a2,
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a3: (*trap_frame).a3,
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a4: (*trap_frame).a4,
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a5: (*trap_frame).a5,
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a6: (*trap_frame).a6,
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a7: (*trap_frame).a7,
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s2: (*trap_frame).s2,
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s3: (*trap_frame).s3,
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s4: (*trap_frame).s4,
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s5: (*trap_frame).s5,
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s6: (*trap_frame).s6,
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s7: (*trap_frame).s7,
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s8: (*trap_frame).s8,
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s9: (*trap_frame).s9,
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s10: (*trap_frame).s10,
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s11: (*trap_frame).s11,
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t3: (*trap_frame).t3,
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t4: (*trap_frame).t4,
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t5: (*trap_frame).t5,
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t6: (*trap_frame).t6,
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};
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_start_trap_atomic_rust(&mut atomic_emulation_trap_frame);
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riscv::register::mepc::write(atomic_emulation_trap_frame.pc);
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(*trap_frame).ra = atomic_emulation_trap_frame.ra;
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(*trap_frame).sp = atomic_emulation_trap_frame.sp;
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(*trap_frame).gp = atomic_emulation_trap_frame.gp;
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(*trap_frame).tp = atomic_emulation_trap_frame.tp;
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(*trap_frame).t0 = atomic_emulation_trap_frame.t0;
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(*trap_frame).t1 = atomic_emulation_trap_frame.t1;
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(*trap_frame).t2 = atomic_emulation_trap_frame.t2;
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(*trap_frame).s0 = atomic_emulation_trap_frame.fp;
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(*trap_frame).s1 = atomic_emulation_trap_frame.s1;
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(*trap_frame).a0 = atomic_emulation_trap_frame.a0;
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(*trap_frame).a1 = atomic_emulation_trap_frame.a1;
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(*trap_frame).a2 = atomic_emulation_trap_frame.a2;
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(*trap_frame).a3 = atomic_emulation_trap_frame.a3;
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(*trap_frame).a4 = atomic_emulation_trap_frame.a4;
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(*trap_frame).a5 = atomic_emulation_trap_frame.a5;
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(*trap_frame).a6 = atomic_emulation_trap_frame.a6;
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(*trap_frame).a7 = atomic_emulation_trap_frame.a7;
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(*trap_frame).s2 = atomic_emulation_trap_frame.s2;
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(*trap_frame).s3 = atomic_emulation_trap_frame.s3;
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(*trap_frame).s4 = atomic_emulation_trap_frame.s4;
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(*trap_frame).s5 = atomic_emulation_trap_frame.s5;
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(*trap_frame).s6 = atomic_emulation_trap_frame.s6;
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(*trap_frame).s7 = atomic_emulation_trap_frame.s7;
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(*trap_frame).s8 = atomic_emulation_trap_frame.s8;
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(*trap_frame).s9 = atomic_emulation_trap_frame.s9;
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(*trap_frame).s10 = atomic_emulation_trap_frame.s10;
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(*trap_frame).s11 = atomic_emulation_trap_frame.s11;
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(*trap_frame).t3 = atomic_emulation_trap_frame.t3;
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(*trap_frame).t4 = atomic_emulation_trap_frame.t4;
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(*trap_frame).t5 = atomic_emulation_trap_frame.t5;
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(*trap_frame).t6 = atomic_emulation_trap_frame.t6;
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}
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#[doc(hidden)]
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#[no_mangle]
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pub fn _setup_interrupts() {
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@ -4,6 +4,13 @@ rustflags = [
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"-C", "link-arg=-Tlinkall.x"
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]
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# for testing: you can specify this target to see atomic emulation in action
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[target.riscv32imac-unknown-none-elf]
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runner = "espflash --format direct-boot --monitor"
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rustflags = [
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"-C", "link-arg=-Tlinkall.x"
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]
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[build]
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target = "riscv32imc-unknown-none-elf"
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@ -27,13 +27,14 @@ categories = [
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format = "direct-boot"
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[dependencies]
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bare-metal = "1.0"
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embedded-hal = { version = "0.2", features = ["unproven"] }
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nb = "1.0"
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riscv = "0.7"
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riscv-rt = { version = "0.8.1", optional = true }
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void = { version = "1.0", default-features = false }
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r0 = "1.0.0"
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bare-metal = "1.0"
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embedded-hal = { version = "0.2", features = ["unproven"] }
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nb = "1.0"
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riscv = "0.7"
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riscv-rt = { version = "0.8.1", optional = true }
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void = { version = "1.0", default-features = false }
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r0 = "1.0.0"
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riscv-atomic-emulation-trap = "0.1.0"
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[dependencies.esp-hal-common]
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path = "../esp-hal-common"
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