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ESP32-S3: Fix PSRAM start address calculation (#2880)
* ESP32-S3: Fix PSRAM start address calculation * Change code for clarity * Explain * Link to esp-idf docs
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@ -169,15 +169,21 @@ pub(crate) fn init_psram(config: PsramConfig) {
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const DR_REG_MMU_TABLE: u32 = 0x600C5000;
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const DR_REG_MMU_TABLE: u32 = 0x600C5000;
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// calculate the PSRAM start address to map
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// calculate the PSRAM start address to map
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let mut start = EXTMEM_ORIGIN;
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// the linker scripts can produce a gap between mapped IROM and DROM segments
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// bigger than a flash page - i.e. we will see an unmapped memory slot
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// start from the end and find the last mapped flash page
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//
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// More general information about the MMU can be found here:
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// https://docs.espressif.com/projects/esp-idf/en/stable/esp32s3/api-reference/system/mm.html#introduction
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let mmu_table_ptr = DR_REG_MMU_TABLE as *const u32;
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let mmu_table_ptr = DR_REG_MMU_TABLE as *const u32;
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for i in 0..FLASH_MMU_TABLE_SIZE {
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let mut mapped_pages = 0;
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for i in (0..FLASH_MMU_TABLE_SIZE).rev() {
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if mmu_table_ptr.add(i).read_volatile() != MMU_INVALID {
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if mmu_table_ptr.add(i).read_volatile() != MMU_INVALID {
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start += MMU_PAGE_SIZE;
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mapped_pages = (i + 1) as u32;
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} else {
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break;
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break;
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}
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}
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}
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}
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let start = EXTMEM_ORIGIN + (MMU_PAGE_SIZE * mapped_pages);
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debug!("PSRAM start address = {:x}", start);
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debug!("PSRAM start address = {:x}", start);
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// Configure the mode of instruction cache : cache size, cache line size.
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// Configure the mode of instruction cache : cache size, cache line size.
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@ -187,7 +193,7 @@ pub(crate) fn init_psram(config: PsramConfig) {
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CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE,
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CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE,
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);
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);
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// If we need use SPIRAM, we should use data cache.Connfigure the mode of data :
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// If we need use SPIRAM, we should use data cache.Configure the mode of data :
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// cache size, cache line size.
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// cache size, cache line size.
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Cache_Suspend_DCache();
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Cache_Suspend_DCache();
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