Update I2C module documentation (#3000)

* feat: Avoid raw md link

* docs: Improve i2c master docs

* fix: Typo

Co-authored-by: Juraj Sadel <jurajsadel@gmail.com>

---------

Co-authored-by: Juraj Sadel <jurajsadel@gmail.com>
This commit is contained in:
Sergio Gasquez Arcos 2025-01-20 17:03:32 +01:00 committed by GitHub
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2 changed files with 14 additions and 3 deletions

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@ -1,9 +1,16 @@
//! # Inter-Integrated Circuit (I2C) - Master mode
//!
//! ## Overview
//!
//! In this mode, the I2C acts as master and initiates the I2C communication by
//! generating a START condition. Note that only one master is allowed to occupy
//! the bus to access one slave at the same time.
//!
//! ## Configuration
//!
//! Each I2C controller is individually configurable, and the usual setting
//! such as frequency, timeout, and SDA/SCL pins can easily be configured.
//! Each I2C Master controller is individually configurable, and the usual
//! setting such as frequency, timeout, and SDA/SCL pins can easily be
//! configured.
//!
//! ## Usage
//!
@ -35,7 +42,8 @@
//! }
//! # }
//! ```
//! [`embedded-hal`]: https://docs.rs/embedded-hal/latest/embedded_hal/index.html
//!
//! [`embedded-hal`]:embedded_hal
use core::marker::PhantomData;
#[cfg(not(esp32))]

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@ -4,6 +4,9 @@
//! protocol that allows co-existence of multiple masters and slaves on the
//! same bus. I2C uses two bidirectional open-drain lines: serial data line
//! (SDA) and serial clock line (SCL), pulled up by resistors.
//!
//! For more information, see
#![doc = crate::trm_markdown_link!("i2c")]
pub mod master;