Reduce duplication, simplify re-exports, and general cleanup/organization (#424)

* Move some linker scripts into `esp-hal-common` and update the build script

* Move `EspDefaultHandler` and `DefaultHandler` definitions into `esp-hal-common`

* Re-export everything from `esp-hal-common`

* Add a couple cfg symbols, cleanup/organize some exports/modules
This commit is contained in:
Jesse Braham 2023-03-08 06:35:59 -08:00 committed by GitHub
parent fd4e8e2778
commit f7830e2750
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
29 changed files with 105 additions and 437 deletions

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@ -1,3 +1,5 @@
use std::{env, fs, path::PathBuf};
fn main() {
let esp32 = cfg!(feature = "esp32");
let esp32c2 = cfg!(feature = "esp32c2");
@ -32,23 +34,25 @@ fn main() {
// - the core count ('single_core' or 'multi_core')
//
// Additionally, the following symbols MAY be defined if present:
// - 'aes'
// - 'dac'
// - 'gdma'
// - 'i2c1'
// - 'i2s'
// - 'mcpwm'
// - 'pcnt'
// - 'pdma'
// - 'plic'
// - 'radio'
// - 'rmt'
// - 'spi3'
// - 'systimer'
// - 'timg0'
// - 'timg1'
// - 'twai'
// - 'uart2'
// - 'usb_otg'
// - 'usb_serial_jtag'
// - 'aes'
// - 'plic'
// - 'radio'
//
// New symbols can be added as needed, but please be sure to update both this
// comment and the required vectors below.
@ -56,19 +60,20 @@ fn main() {
vec![
"esp32",
"xtensa",
"mcpwm",
"multi_core",
"aes",
"dac",
"i2c1",
"i2s",
"mcpwm",
"pcnt",
"pdma",
"radio",
"rmt",
"spi3",
"timg0",
"timg1",
"uart2",
"aes",
"radio",
]
} else if esp32c2 {
vec![
@ -76,80 +81,86 @@ fn main() {
"riscv",
"single_core",
"gdma",
"radio",
"systimer",
"timg0",
"radio",
]
} else if esp32c3 {
vec![
"esp32c3",
"riscv",
"single_core",
"aes",
"gdma",
"i2s",
"radio",
"rmt",
"spi3",
"systimer",
"timg0",
"timg1",
"twai",
"usb_serial_jtag",
"aes",
"radio",
]
} else if esp32c6 {
vec![
"esp32c6",
"riscv",
"single_core",
"aes",
"gdma",
"i2s",
"mcpwm",
"pcnt",
"plic",
"radio",
"rmt",
"systimer",
"timg0",
"timg1",
"twai",
"usb_serial_jtag",
"plic",
"aes",
"radio",
]
} else if esp32s2 {
vec![
"esp32s2",
"xtensa",
"single_core",
"aes",
"dac",
"i2c1",
"i2s",
"pcnt",
"pdma",
"radio",
"rmt",
"spi3",
"systimer",
"timg0",
"timg1",
"usb_otg",
"aes",
"radio",
]
} else if esp32s3 {
vec![
"esp32s3",
"xtensa",
"multi_core",
"aes",
"gdma",
"i2c1",
"i2s",
"mcpwm",
"pcnt",
"radio",
"rmt",
"spi3",
"systimer",
"timg0",
"timg1",
"twai",
"uart2",
"usb_otg",
"usb_serial_jtag",
"aes",
"radio",
]
} else {
unreachable!(); // We've already confirmed exactly one chip was selected
@ -158,4 +169,16 @@ fn main() {
for symbol in symbols {
println!("cargo:rustc-cfg={symbol}");
}
// Place all linker scripts in `OUT_DIR`, and instruct Cargo how to find these
// files:
let out = PathBuf::from(env::var_os("OUT_DIR").unwrap());
println!("cargo:rustc-link-search={}", out.display());
if esp32 || esp32s2 || esp32s3 {
fs::copy("ld/xtensa/hal-defaults.x", out.join("hal-defaults.x")).unwrap();
fs::copy("ld/xtensa/rom.x", out.join("alias.x")).unwrap();
} else {
fs::copy("ld/riscv/hal-defaults.x", out.join("hal-defaults.x")).unwrap();
}
}

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@ -0,0 +1,9 @@
#[cfg(riscv)]
pub use riscv::*;
#[cfg(xtensa)]
pub use xtensa::*;
#[cfg(riscv)]
mod riscv;
#[cfg(xtensa)]
mod xtensa;

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@ -22,32 +22,27 @@
#![no_std]
#![cfg_attr(xtensa, feature(asm_experimental_arch))]
#![cfg_attr(feature = "async", allow(incomplete_features))]
#![cfg_attr(feature = "async", feature(async_fn_in_trait))]
#![cfg_attr(feature = "async", feature(impl_trait_projections))]
#![cfg_attr(
feature = "async",
allow(incomplete_features),
feature(async_fn_in_trait),
feature(impl_trait_projections)
)]
#[cfg(riscv)]
pub use esp_riscv_rt;
#[cfg(riscv)]
pub use esp_riscv_rt::entry;
#[cfg(riscv)]
pub use esp_riscv_rt::riscv;
pub use esp_riscv_rt::{self, entry, riscv};
pub use procmacros as macros;
#[cfg(xtensa)]
pub use xtensa_lx;
#[cfg(xtensa)]
pub use xtensa_lx_rt;
#[cfg(xtensa)]
pub use xtensa_lx_rt::entry;
/// State of the CPU saved when entering exception or interrupt
pub mod trapframe {
#[cfg(riscv)]
pub use esp_riscv_rt::TrapFrame;
#[cfg(xtensa)]
pub use xtensa_lx_rt::exception::Context as TrapFrame;
}
pub use xtensa_lx_rt::{self, entry};
#[cfg(dac)]
pub use self::analog::dac::implementation as dac;
#[cfg(gdma)]
pub use self::dma::gdma;
#[cfg(pdma)]
pub use self::dma::pdma;
#[cfg(rmt)]
pub use self::pulse_control::PulseControl;
#[cfg(any(esp32, esp32s3))]
@ -55,6 +50,7 @@ pub use self::soc::cpu_control;
#[cfg(usb_serial_jtag)]
pub use self::usb_serial_jtag::UsbSerialJtag;
pub use self::{
analog::adc::implementation as adc,
delay::Delay,
interrupt::*,
rng::Rng,
@ -77,12 +73,13 @@ pub mod gpio;
pub mod i2c;
#[cfg(i2s)]
pub mod i2s;
pub mod interrupt;
pub mod ledc;
#[cfg(mcpwm)]
pub mod mcpwm;
#[cfg(usb_otg)]
pub mod otg_fs;
#[cfg(any(esp32, esp32s2, esp32s3, esp32c6))]
#[cfg(pcnt)]
pub mod pcnt;
pub mod peripheral;
pub mod prelude;
@ -100,7 +97,7 @@ pub mod system;
#[cfg(systimer)]
pub mod systimer;
pub mod timer;
#[cfg(any(esp32c3, esp32c6, esp32s3))]
#[cfg(any(twai))]
pub mod twai;
pub mod uart;
#[cfg(usb_serial_jtag)]
@ -108,9 +105,20 @@ pub mod usb_serial_jtag;
#[cfg(rmt)]
pub mod utils;
#[cfg_attr(riscv, path = "interrupt/riscv.rs")]
#[cfg_attr(xtensa, path = "interrupt/xtensa.rs")]
pub mod interrupt;
/// State of the CPU saved when entering exception or interrupt
pub mod trapframe {
#[cfg(riscv)]
pub use esp_riscv_rt::TrapFrame;
#[cfg(xtensa)]
pub use xtensa_lx_rt::exception::Context as TrapFrame;
}
#[no_mangle]
extern "C" fn EspDefaultHandler(_level: u32, _interrupt: peripherals::Interrupt) {}
#[cfg(xtensa)]
#[no_mangle]
extern "C" fn DefaultHandler() {}
#[cfg(esp32c6)]
pub fn disable_apm_filter() {

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@ -9,16 +9,6 @@ fn main() {
.write_all(include_bytes!("ld/memory.x"))
.unwrap();
File::create(out.join("alias.x"))
.unwrap()
.write_all(include_bytes!("ld/rom.x"))
.unwrap();
File::create(out.join("hal-defaults.x"))
.unwrap()
.write_all(include_bytes!("ld/hal-defaults.x"))
.unwrap();
File::create(out.join("rom-functions.x"))
.unwrap()
.write_all(include_bytes!("ld/rom-functions.x"))

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@ -10,10 +10,10 @@ use core::cell::RefCell;
use critical_section::Mutex;
use esp32_hal::{
clock::ClockControl,
cpu_control::CpuControl,
peripherals::{Peripherals, TIMG1},
prelude::*,
timer::{Timer, Timer0, TimerGroup},
CpuControl,
Rtc,
};
use esp_backtrace as _;

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@ -4,45 +4,7 @@ pub use embedded_hal as ehal;
#[cfg(feature = "embassy")]
pub use esp_hal_common::embassy;
#[doc(inline)]
pub use esp_hal_common::{
aes,
analog::adc::implementation as adc,
analog::dac::implementation as dac,
clock,
cpu_control::CpuControl,
dma,
dma::pdma,
efuse,
entry,
gpio,
i2c,
i2s,
interrupt,
ledc,
macros,
mcpwm,
pcnt,
peripheral::Peripheral,
peripherals,
prelude,
pulse_control,
sha,
spi,
system,
timer,
trapframe,
uart,
utils,
xtensa_lx,
xtensa_lx_rt,
Cpu,
Delay,
PulseControl,
Rng,
Rtc,
Rwdt,
Uart,
};
pub use esp_hal_common::*;
pub use self::gpio::IO;
@ -51,12 +13,6 @@ pub mod analog {
pub use esp_hal_common::analog::{AvailableAnalog, SensExt};
}
#[no_mangle]
extern "C" fn EspDefaultHandler(_level: u32, _interrupt: peripherals::Interrupt) {}
#[no_mangle]
extern "C" fn DefaultHandler() {}
/// Function initializes ESP32 specific memories (RTC slow and fast) and
/// then calls original Reset function
///

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@ -75,11 +75,6 @@ fn check_features() {
fn add_defaults() {
let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
File::create(out.join("hal-defaults.x"))
.unwrap()
.write_all(include_bytes!("ld/hal-defaults.x"))
.unwrap();
File::create(out.join("rom-functions.x"))
.unwrap()
.write_all(include_bytes!("ld/rom-functions.x"))

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@ -4,35 +4,7 @@ pub use embedded_hal as ehal;
#[cfg(feature = "embassy")]
pub use esp_hal_common::embassy;
#[doc(inline)]
pub use esp_hal_common::{
analog::adc::implementation as adc,
clock,
dma::{self, gdma},
efuse,
entry,
gpio,
i2c,
interrupt,
ledc,
macros,
peripheral::Peripheral,
peripherals,
prelude,
riscv,
sha,
spi,
system,
systimer,
timer,
trapframe,
uart,
Cpu,
Delay,
Rng,
Rtc,
Rwdt,
Uart,
};
pub use esp_hal_common::*;
pub use self::gpio::IO;
@ -73,6 +45,3 @@ pub fn mp_hook() -> bool {
false
}
}
#[no_mangle]
extern "C" fn EspDefaultHandler(_interrupt: peripherals::Interrupt) {}

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@ -121,11 +121,6 @@ fn main() {
fn add_defaults() {
let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
File::create(out.join("hal-defaults.x"))
.unwrap()
.write_all(include_bytes!("ld/hal-defaults.x"))
.unwrap();
File::create(out.join("rom-functions.x"))
.unwrap()
.write_all(include_bytes!("ld/rom-functions.x"))

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@ -1,33 +0,0 @@
PROVIDE(interrupt1 = DefaultHandler);
PROVIDE(interrupt2 = DefaultHandler);
PROVIDE(interrupt3 = DefaultHandler);
PROVIDE(interrupt4 = DefaultHandler);
PROVIDE(interrupt5 = DefaultHandler);
PROVIDE(interrupt6 = DefaultHandler);
PROVIDE(interrupt7 = DefaultHandler);
PROVIDE(interrupt8 = DefaultHandler);
PROVIDE(interrupt9 = DefaultHandler);
PROVIDE(interrupt10 = DefaultHandler);
PROVIDE(interrupt11 = DefaultHandler);
PROVIDE(interrupt12 = DefaultHandler);
PROVIDE(interrupt13 = DefaultHandler);
PROVIDE(interrupt14 = DefaultHandler);
PROVIDE(interrupt15 = DefaultHandler);
PROVIDE(interrupt16 = DefaultHandler);
PROVIDE(interrupt17 = DefaultHandler);
PROVIDE(interrupt18 = DefaultHandler);
PROVIDE(interrupt19 = DefaultHandler);
PROVIDE(interrupt20 = DefaultHandler);
PROVIDE(interrupt21 = DefaultHandler);
PROVIDE(interrupt22 = DefaultHandler);
PROVIDE(interrupt23 = DefaultHandler);
PROVIDE(interrupt24 = DefaultHandler);
PROVIDE(interrupt25 = DefaultHandler);
PROVIDE(interrupt26 = DefaultHandler);
PROVIDE(interrupt27 = DefaultHandler);
PROVIDE(interrupt28 = DefaultHandler);
PROVIDE(interrupt29 = DefaultHandler);
PROVIDE(interrupt30 = DefaultHandler);
PROVIDE(interrupt31 = DefaultHandler);
INCLUDE "device.x"

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@ -7,43 +7,7 @@ pub use embedded_hal as ehal;
#[cfg(feature = "embassy")]
pub use esp_hal_common::embassy;
#[doc(inline)]
pub use esp_hal_common::{
aes,
analog::adc::implementation as adc,
clock,
dma,
dma::gdma,
efuse,
entry,
gpio,
i2c,
i2s,
interrupt,
ledc,
macros,
peripheral::Peripheral,
peripherals,
prelude,
pulse_control,
riscv,
sha,
spi,
system,
systimer,
timer,
trapframe,
twai,
uart,
utils,
Cpu,
Delay,
PulseControl,
Rng,
Rtc,
Rwdt,
Uart,
UsbSerialJtag,
};
pub use esp_hal_common::*;
pub use self::gpio::IO;
@ -237,6 +201,3 @@ pub fn mp_hook() -> bool {
false
}
#[no_mangle]
extern "C" fn EspDefaultHandler(_interrupt: peripherals::Interrupt) {}

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@ -65,11 +65,6 @@ fn main() {
fn add_defaults() {
let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
File::create(out.join("hal-defaults.x"))
.unwrap()
.write_all(include_bytes!("ld/hal-defaults.x"))
.unwrap();
File::create(out.join("rom-functions.x"))
.unwrap()
.write_all(include_bytes!("ld/rom-functions.x"))

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@ -19,6 +19,11 @@ PROVIDE(MachineExternal = DefaultHandler);
PROVIDE(DefaultHandler = DefaultInterruptHandler);
PROVIDE(ExceptionHandler = DefaultExceptionHandler);
/* The ESP32-C2 and ESP32-C3 have interrupt IDs 1-31, while the ESP32-C6 has
IDs 0-31, so we much define the handler for the one additional interrupt
ID: */
PROVIDE(interrupt0 = DefaultHandler);
/* # Pre-initialization function */
/* If the user overrides this using the `#[pre_init]` attribute or by creating a `__pre_init` function,
then the function this points to will be called before the RAM is initialized. */

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@ -19,6 +19,11 @@ PROVIDE(MachineExternal = DefaultHandler);
PROVIDE(DefaultHandler = DefaultInterruptHandler);
PROVIDE(ExceptionHandler = DefaultExceptionHandler);
/* The ESP32-C2 and ESP32-C3 have interrupt IDs 1-31, while the ESP32-C6 has
IDs 0-31, so we much define the handler for the one additional interrupt
ID: */
PROVIDE(interrupt0 = DefaultHandler);
/* # Pre-initialization function */
/* If the user overrides this using the `#[pre_init]` attribute or by creating a `__pre_init` function,
then the function this points to will be called before the RAM is initialized. */

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@ -1,34 +0,0 @@
PROVIDE(interrupt0 = DefaultHandler);
PROVIDE(interrupt1 = DefaultHandler);
PROVIDE(interrupt2 = DefaultHandler);
PROVIDE(interrupt3 = DefaultHandler);
PROVIDE(interrupt4 = DefaultHandler);
PROVIDE(interrupt5 = DefaultHandler);
PROVIDE(interrupt6 = DefaultHandler);
PROVIDE(interrupt7 = DefaultHandler);
PROVIDE(interrupt8 = DefaultHandler);
PROVIDE(interrupt9 = DefaultHandler);
PROVIDE(interrupt10 = DefaultHandler);
PROVIDE(interrupt11 = DefaultHandler);
PROVIDE(interrupt12 = DefaultHandler);
PROVIDE(interrupt13 = DefaultHandler);
PROVIDE(interrupt14 = DefaultHandler);
PROVIDE(interrupt15 = DefaultHandler);
PROVIDE(interrupt16 = DefaultHandler);
PROVIDE(interrupt17 = DefaultHandler);
PROVIDE(interrupt18 = DefaultHandler);
PROVIDE(interrupt19 = DefaultHandler);
PROVIDE(interrupt20 = DefaultHandler);
PROVIDE(interrupt21 = DefaultHandler);
PROVIDE(interrupt22 = DefaultHandler);
PROVIDE(interrupt23 = DefaultHandler);
PROVIDE(interrupt24 = DefaultHandler);
PROVIDE(interrupt25 = DefaultHandler);
PROVIDE(interrupt26 = DefaultHandler);
PROVIDE(interrupt27 = DefaultHandler);
PROVIDE(interrupt28 = DefaultHandler);
PROVIDE(interrupt29 = DefaultHandler);
PROVIDE(interrupt30 = DefaultHandler);
PROVIDE(interrupt31 = DefaultHandler);
INCLUDE "device.x"

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@ -3,45 +3,7 @@
pub use embedded_hal as ehal;
#[cfg(feature = "embassy")]
pub use esp_hal_common::embassy;
pub use esp_hal_common::{
aes,
analog::adc::implementation as adc,
clock,
dma,
dma::gdma,
efuse,
entry,
gpio,
i2c,
i2s,
interrupt,
ledc,
macros,
mcpwm,
pcnt,
peripheral::Peripheral,
peripherals,
prelude,
pulse_control,
riscv,
sha,
spi,
system,
systimer,
timer,
trapframe,
twai,
uart,
utils,
Cpu,
Delay,
PulseControl,
Rng,
Rtc,
Rwdt,
Uart,
UsbSerialJtag,
};
pub use esp_hal_common::*;
pub use self::gpio::IO;
@ -110,6 +72,3 @@ pub fn mp_hook() -> bool {
false
}
#[no_mangle]
extern "C" fn EspDefaultHandler(_interrupt: peripherals::Interrupt) {}

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@ -8,16 +8,6 @@ fn main() {
.write_all(include_bytes!("ld/memory.x"))
.unwrap();
File::create(out.join("alias.x"))
.unwrap()
.write_all(include_bytes!("ld/rom.x"))
.unwrap();
File::create(out.join("hal-defaults.x"))
.unwrap()
.write_all(include_bytes!("ld/hal-defaults.x"))
.unwrap();
File::create(out.join("rom-functions.x"))
.unwrap()
.write_all(include_bytes!("ld/rom-functions.x"))

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@ -1,7 +0,0 @@
PROVIDE(level1_interrupt = DefaultHandler);
PROVIDE(level2_interrupt = DefaultHandler);
PROVIDE(level3_interrupt = DefaultHandler);
PROVIDE(level4_interrupt = DefaultHandler);
PROVIDE(level5_interrupt = DefaultHandler);
PROVIDE(level6_interrupt = DefaultHandler);
PROVIDE(level7_interrupt = DefaultHandler);

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@ -1,4 +0,0 @@
REGION_ALIAS("ROTEXT", irom_seg);
REGION_ALIAS("RWTEXT", iram_seg);
REGION_ALIAS("RODATA", drom_seg);
REGION_ALIAS("RWDATA", dram_seg);

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@ -1,50 +1,12 @@
#![no_std]
// always enable atomic emulation on ESP32-S2
pub use embedded_hal as ehal;
#[cfg(feature = "embassy")]
pub use esp_hal_common::embassy;
use esp_hal_common::xtensa_lx_rt::exception::ExceptionCause;
#[doc(inline)]
pub use esp_hal_common::{
aes,
analog::adc::implementation as adc,
analog::dac::implementation as dac,
clock,
dma,
dma::pdma,
efuse,
entry,
gpio,
i2c::{self, I2C},
i2s,
interrupt,
ledc,
macros,
otg_fs,
pcnt,
peripheral::Peripheral,
peripherals,
prelude,
pulse_control,
sha,
spi,
system,
systimer,
timer,
trapframe,
uart,
utils,
xtensa_lx,
xtensa_lx_rt,
Cpu,
Delay,
PulseControl,
Rng,
Rtc,
Rwdt,
Uart,
};
pub use esp_hal_common::*;
// Always enable atomic emulation on ESP32-S2
use xtensa_atomic_emulation_trap as _;
pub mod rt {
@ -58,12 +20,6 @@ pub mod analog {
pub use esp_hal_common::analog::{AvailableAnalog, SensExt};
}
#[no_mangle]
extern "C" fn EspDefaultHandler(_level: u32, _interrupt: peripherals::Interrupt) {}
#[no_mangle]
extern "C" fn DefaultHandler() {}
/// Function initializes ESP32 specific memories (RTC slow and fast) and
/// then calls original Reset function
///

View File

@ -9,11 +9,6 @@ fn main() {
.write_all(include_bytes!("ld/memory.x"))
.unwrap();
File::create(out.join("alias.x"))
.unwrap()
.write_all(include_bytes!("ld/rom.x"))
.unwrap();
File::create(out.join("esp32s3.x"))
.unwrap()
.write_all(include_bytes!("ld/esp32s3.x"))
@ -42,11 +37,6 @@ fn main() {
.write_all(include_bytes!("ld/db-memory.x"))
.unwrap();
File::create(out.join("alias.x"))
.unwrap()
.write_all(include_bytes!("ld/rom.x"))
.unwrap();
File::create(out.join("esp32s3.x"))
.unwrap()
.write_all(include_bytes!("ld/db-esp32s3.x"))
@ -69,11 +59,6 @@ fn main() {
fn add_defaults() {
let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
File::create(out.join("hal-defaults.x"))
.unwrap()
.write_all(include_bytes!("ld/hal-defaults.x"))
.unwrap();
File::create(out.join("rom-functions.x"))
.unwrap()
.write_all(include_bytes!("ld/rom-functions.x"))

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@ -10,10 +10,10 @@ use core::cell::RefCell;
use critical_section::Mutex;
use esp32s3_hal::{
clock::ClockControl,
cpu_control::CpuControl,
peripherals::{Peripherals, TIMG1},
prelude::*,
timer::{Timer, Timer0, TimerGroup},
CpuControl,
Rtc,
};
use esp_backtrace as _;

View File

@ -1,7 +0,0 @@
PROVIDE(level1_interrupt = DefaultHandler);
PROVIDE(level2_interrupt = DefaultHandler);
PROVIDE(level3_interrupt = DefaultHandler);
PROVIDE(level4_interrupt = DefaultHandler);
PROVIDE(level5_interrupt = DefaultHandler);
PROVIDE(level6_interrupt = DefaultHandler);
PROVIDE(level7_interrupt = DefaultHandler);

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@ -3,3 +3,4 @@ PROVIDE(ets_update_cpu_frequency_rom = 0x40043164);
PROVIDE(rom_i2c_writeReg = 0x40005d60);
PROVIDE(rom_i2c_writeReg_Mask = 0x40005d6c);
PROVIDE(rtc_get_reset_reason = 0x4000057c);
PROVIDE( rom_config_instruction_cache_mode = 0x40001a1c );

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@ -1,6 +0,0 @@
REGION_ALIAS("ROTEXT", irom_seg);
REGION_ALIAS("RWTEXT", iram_seg);
REGION_ALIAS("RODATA", drom_seg);
REGION_ALIAS("RWDATA", dram_seg);
PROVIDE( rom_config_instruction_cache_mode = 0x40001a1c );

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@ -1,52 +1,15 @@
#![no_std]
#![cfg_attr(feature = "direct-boot", feature(naked_functions))]
#![cfg_attr(feature = "direct-boot", feature(asm_experimental_arch))]
#![cfg_attr(
feature = "direct-boot",
feature(asm_experimental_arch),
feature(naked_functions)
)]
pub use embedded_hal as ehal;
#[cfg(feature = "embassy")]
pub use esp_hal_common::embassy;
#[doc(inline)]
pub use esp_hal_common::{
aes,
analog::adc::implementation as adc,
clock,
cpu_control::CpuControl,
dma::{self, gdma},
efuse,
entry,
gpio,
i2c,
i2s,
interrupt,
ledc,
macros,
mcpwm,
otg_fs,
pcnt,
peripheral::Peripheral,
peripherals,
prelude,
pulse_control,
sha,
spi,
system,
systimer,
timer,
trapframe,
twai,
uart,
utils,
xtensa_lx,
xtensa_lx_rt,
Cpu,
Delay,
PulseControl,
Rng,
Rtc,
Rwdt,
Uart,
UsbSerialJtag,
};
pub use esp_hal_common::*;
pub use self::gpio::IO;
@ -55,12 +18,6 @@ pub mod analog {
pub use esp_hal_common::analog::{AvailableAnalog, SensExt};
}
#[no_mangle]
extern "C" fn EspDefaultHandler(_level: u32, _interrupt: peripherals::Interrupt) {}
#[no_mangle]
extern "C" fn DefaultHandler() {}
#[cfg(all(feature = "rt", feature = "direct-boot"))]
#[doc(hidden)]
#[no_mangle]