* Update to latest version of `checkout` action
* Re-order jobs to match order on filesystem
* Check all features of `esp-riscv-rt`
* Check both `esp32s2` and `esp32s3` feature for `esp-ulp-riscv-hal`
* Add a `ci` feature to `esp-riscv-rt` to making testing easier
* Temporarily disable async `SYSTIMER` implementation, remove mention from `CHANGELOG.md`
* Remove a couple files which are not required
* Fix warning for `sha` examples
* Fix warning for non-C3 devices
* s/interrupt_clear/clear_interrupt/
* Use all remaining memory for stack(s)
* Remove HEAP related code from RISCV linker scripts
* Fix direct-boot / mcu-boot linker scripts
* Use a statically allocated stack for core-1
* direct vectoring support added
* provide minimal handlers for hooking the vector table directly
* changed direct vectoring interrupt enable interface to map to CPU interrupt
* direct vectoring interrupt nesting
* removed unused dependency
* added tentative c2 and c6 support for direct vector table hooking
* added direct vectoring examples
* added direct vectoring examples
* updated changelog
* added direct vectoring to CI
* Added H2 support and example, moved helpers to esp-hal-common
* Added H2 direct vectoring example to CI
* Removed remnants of removed feature
* C6 and H2 examples fixed
* C6 and H2 examples fixed
* C6 and H2 examples fixed
* Comment fixed
* Added preemption flag to RT
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Co-authored-by: Scott Mabin <scott@mabez.dev>
