130 Commits

Author SHA1 Message Date
Jesse Braham
c0eaa91a6f Fix examples after a bad rebase 2023-01-27 11:06:29 -08:00
Jesse Braham
cf270700e7
Use the new esp-riscv-rt package for RISC-V HALs (#365)
* Update PACs and modify `esp-hal-common` to use new `esp-riscv-rt` package

* Update `esp32c2-hal` and `esp32c3-hal` to use `esp-riscv-rt` as well

* Update all RISC-V examples to use `esp-riscv-rt`

* Update RISC-V trap frame handling according to review feedback
2023-01-27 10:49:38 -08:00
Scott Mabin
0eac22eba1
Async: GPIO (#333)
* Add `is_listening` to `Pin` trait

* Add `Wait` impl for Gpio Input

* Add GPIO wait example for C3

* Ensure correct bank is accessed in interrupt

* Add esp32c2 wait example

* Add esp32s3 wait example

* Add esp32s2 wait example

* Add esp32 wait example

* Run fmt

* Add example to cargo tomls

* Add top level docs for embassy examples

* Mention the higher MSRV for async in the README

---------

Co-authored-by: Jesse Braham <jesse@beta7.io>
2023-01-27 10:44:08 -08:00
Jesse Braham
d03c267084 New releases for all HAL packages 2023-01-26 08:51:24 -08:00
mhead
586276fd34 aes accelerator implementation 2023-01-24 10:04:57 -08:00
Jesse Braham
832f9ef4d4
Refactor the clock module, provide ROM functions via linker scripts (#353)
* Refactor `clock` and `clocks_ll` into a common module

* Add a ROM function linker script to each HAL and provide some functions

* Use the provided ROM functions instead of transmuting addresses

* Fix CI workflow for ESP32-S2
2023-01-23 07:12:33 -08:00
Jesse Braham
d29c4b1dcf
Update a number of dependencies to get RISC-V HALs building again (#350)
* Update `riscv`, `riscv-rt` dependencies, plus PACs for RISC-V chips

* Update `riscv-atomic-emulation-trap` package

* Update the `embassy-executor` dev dependency to a newer version
2023-01-18 14:08:30 -08:00
Alex Bohm
1f6803776c
Initial TWAI Driver Implementation (#192)
* wip: initial implementation of transmission only.

* Moved TWAI to its own directory and added initial reception of packets.

* Added extended id transmit and receive.

* Added maybe better code for making packet filters.

* Fixed bug with ids and improved methods of copying data to the peripheral.

* Added some guards against Bus Off

* Added reception of remote frames.

* Clean up of comments, etc

* Updated TWAI naming and cleaned up example a bit.

* Updated bitselector to include better unpacking methods.

* Add embedded-can and limit initial TWAI implementation to esp32c3.

* Added embedded-can to esp32c3 twai example.

* Switched twai filter to using bytestrings.

Co-authored-by: dimi <dimi.polonski@gmail.com>

* Implemented new() for twai filters.

* Clean up TWAI docs and example.

* Fix filter constructors and add examples.

* pre driver PeripheralRef update.

* PeripheralRef/twai

* Format comments with nightly rustfmt.

* Add gpio PeripheralRef and use volatile for direct register access.

Co-authored-by: dimi <dimi.polonski@gmail.com>
2022-12-22 00:54:06 +00:00
Scott Mabin
452fde2c12
Peripheral ref/gpio (#323)
* Implement Peripheral for all GPIO pins

* Update i2c & i2s to use the new gpio peripherals ref

* gpio pref: usb

* gpio pref: pulse control (RMT)

* gpio pref: spi

* gpio pref: uart

* gpio pref: ledc

* gpio pref: mcpwm

* fixup smartleds to use new pulse controller traits

* dump msrv

* bump rust-version in cargo tomls
2022-12-19 14:40:29 +00:00
Jesse Braham
220f812625
Peripheral ref/sha (#312)
* Add SHA to list of peripherals to be created

* Refactor SHA peripheral to use PeripheralRef

* Update SHA examples to get them building again
2022-12-14 12:19:53 +00:00
bjoernQ
dc8963c0a8 Support ESP32-C2 with 26MHz Xtal 2022-12-13 05:15:10 -08:00
Scott Mabin
248fb356f8
PeripheralRef init: uart (#272)
* Add the peripheral module plus some helper macros in preparation

* peripheral macro

* Add peripheral generation macro

* Fixes after rebase

* Update the signature of Peripherals::take

* syncronise hello world example

* fmt the entire repo

Co-authored-by: Jesse Braham <jesse@beta7.io>
2022-12-12 14:45:33 +00:00
Jesse Braham
03d94a0ba2 New releases for all HALs 2022-12-12 01:29:49 -08:00
Scott Mabin
0000d46ac5 Embassy init updates:
- Rename timg feature to timg0 to better refect which TG is being used
- Use the time_driver::TimerType in the signature of init to fix #268
- Update examples
- Fix CI features
- Add timg0 cfg to build.rs
2022-12-08 06:36:42 -08:00
bjoernQ
4ab05e8923 Pass trap frame to CPU interrupt handlers (Xtensa) 2022-12-06 02:07:49 -08:00
Josh Weberruss
bc39cdae86 Add Rx and interrupts to UsbSerialJtag
Add non-blocking Write
2022-12-01 22:02:47 +11:00
Jesse Braham
5d48e77d5e
Fix clippy warnings, update READMEs (#284)
* Fix a couple clippy warnings

* Create features for architecture-specific depdendencies

* README updates
2022-11-30 10:13:40 -08:00
Björn Quentin
bc4e180a1a
Merge pull request #280 from bjoernQ/gpio-refactoring
GPIO module refactoring
2022-11-30 08:15:13 +01:00
dimi
7a51433944 remove i2c::SetupError and make i2c::I2C::new infallible 2022-11-29 14:19:45 +01:00
bjoernQ
878bbc4c0c GPIO module refactoring 2022-11-29 12:03:04 +01:00
C2D
59d02f5f6e
Add SHA accelerator implementation (#257)
* Add untested basic SHA for esp-sX/cX chips

* Fix ptr type inconsistency for S2

* Add ESP32 impl & fix process_buffer latch issue

* Add debug example for SHA accelerator

* Clean up no-op buffer prints

* Test vector parity (on esp32s3)

* Checkpoint for converting to alignment helper

* Finish refactoring & additional parity tests on esp32s3

* Remove core_intrinsics requirement for now

* Fix case where (src.len() % 4) == 3

* Finish sha2 example with performance comparison (12-61x speedup)

* Refactor ESP32 to alignment helper & Clean up example

* Prevent out-of-bounds reads in ESP32 version

* Revert Cargo debug changes

* Remove cargo config.toml

* Clean up example

* Remove common/rust-toolchain & ignore in future

* Might as well use actual size_of const

* Remove SHA512/SHA384 for C2/C3

* Directly import nb::block! to remove unused import warning & fix c2 feature detect

* Remove stray newlines

* Fix esp32c2 having SHA256

* ESP32 also has SHA384

* Remove comments that don't have a purpose

* Clean up example & finish() handling

* Add examples & add ESP32 free()

* Update C2/C3 examples to show accurate algorithm used

* Fix busy check for ESP32

* Remove outdated TODO comment

* Update PAC for ESP3 and (actually) fix busy check

* Refactor ESP32 version to reduce search space

* Add debug printlns to sha example & clean up comments

* Fix ESP32 version, finally

Co-authored-by: ferris <ferris@devdroplets.com>
Co-authored-by: Jesse Braham <jesse@beta7.io>
2022-11-28 14:20:31 -08:00
icedrocket
177d278223
Add more trait re-exports to prelude module (#260)
* Add more trait re-exports to prelude module

* Don't expose usb_serial_jtag module

* Add missing system module re-exports
2022-11-23 07:24:47 -08:00
bjoernQ
cb41b9553b Avoid possible linker error 2022-11-21 07:01:50 -08:00
Jesse Braham
096ff3439d
New releases for all HALs (#265)
* Update all dependencies to their latest versions

* Bump version numbers
2022-11-17 09:13:41 -08:00
bjoernQ
4afa8fda92 Preliminary I2S Implementation 2022-11-17 08:24:43 -08:00
Scott Mabin
9064177e99
Initial embassy support (#225)
* wip: timg embassy driver

- read_raw on timg renamed to now()
- timg initialized and stored in static for use in the embassy driver
- timg sets alarm value
- untested whether alarms actually trigger

* TIMG timer driver for esp32, esp32s3

- Adds the timg timer block as a time driver for embassy
- Not enabled on the C3 as it only has one timer block, better to use
  systimer
- s2 example added but can't build due to atomic requirements in
  futures-core

* Add S2 atomic support with emulation, fixup embassy support for the S2

* Move executor & static-cell to dev deps. Make eha optional

* Add c2 support, run fmt

* Update to crates.io embassy releases

* Update eha

* update timg time driver to new trait

* Remove exception feature of esp-backtrace and use the user handler for backtracing

* Add async testing workflow

* Update systick example

* Fix S2 examples

* Update xtensa-toolchain

* set rustflags for s2 target

* Disable systick for esp32s2 until we can fix the noted issues

* review improvements

- Fix intr prio array being off by one
- emabssy time prio interrupt set to max prio
- use cfg instead of feature for systick detection

* Update example time delays
2022-11-09 08:04:38 -08:00
Björn Quentin
8bdf11b287
I2C Driver Refactoring (#233)
* I2C Driver Refactoring

* Improve I2C error handling and robustness
2022-11-09 06:34:55 -08:00
icedrocket
b52670a3e9 doc: add #[doc(inline)] to esp-hal-common re-exports 2022-11-08 18:26:00 +09:00
9names
0f803d07cd Add uninit section to bl and mv linker scripts to match db 2022-11-03 19:37:00 +11:00
Juraj Sadel
f6ba237e76
ADC: Refactor, join S2 and S3 together and C2 and C3 as well (#245)
* ADC: Refactor, join S2 and S3 together and C2 and C3 as well

* S3: Update PAC version
2022-11-02 10:38:03 -07:00
Gustavo Henrique Nihei
1ced513d96 Add documentation about supported boot methods
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-10-24 11:01:50 -03:00
Gustavo Henrique Nihei
5cca83ca51 esp32c3: Set entry point address on MCUboot image header
Previously it assumed that the entry point was allocated at the
beginning of the ".rwtext" output section, which is not always true.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-10-24 09:52:46 -03:00
Gustavo Henrique Nihei
5b6c52c02c esp32c3: Add support for booting from MCUboot bootloader
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-10-24 09:37:52 -03:00
Björn Quentin
9744d12484
SPI-DMA for ESP32 (#216)
* SPI-DMA for ESP32

* MSRV Fix
2022-10-20 09:12:31 -07:00
bjoernQ
9cb24bb79f Basic DMA for ESP32-C3 2022-10-13 10:14:51 -07:00
Björn Quentin
82c3ca29be
Merge pull request #198 from rustbox/opt-level-z-check-prototype
Check for opt-level="z" in `build.rs`, provide feedback about dangers
2022-10-11 16:56:21 +02:00
Luo Jia / Zhouqi Jiang
efced81d94
crate: update riscv dependency crate to v0.9.0
The `riscv` crate has introduced several fixes which newer users would take advantage of (https://github.com/rust-embedded/riscv/pull/112)
2022-10-08 20:18:49 +08:00
Björn Quentin
af745ac7b0
Fix ESP32-C3 interrupt/exception handling (#207)
* Fix ESP32-C3 interrupt/exception handling

* Use riscv-atomic-emulation-trap 0.2.0
2022-10-05 14:15:17 +01:00
sethp
3832008565
Merge branch 'main' into opt-level-z-check-prototype 2022-09-30 07:52:41 -07:00
sethp
11e988b8f0
Fix message spelling
supress -> suppress

Co-authored-by: Gustavo Henrique Nihei <38959758+gustavonihei@users.noreply.github.com>
2022-09-30 07:51:25 -07:00
Jesse Braham
5054681ba3 Update to newest embedded-hal alpha and add embedded-hal-nb 2022-09-29 16:07:49 +02:00
Jesse Braham
d885054fd2 Use esp_println in favour of the Serial peripheral wherever possible 2022-09-28 13:09:06 -07:00
Seth Pellegrino
3f704eba0d Reword message to make it clear user code will also fail 2022-09-27 08:35:32 -07:00
Seth Pellegrino
c6ac87f4dc Add check for opt-level="z" for esp32c3 2022-09-26 11:01:25 -07:00
Juraj Sadel
0f9fdb7c15 RMT: Shouldn't be possible to assign pins multiple times into channel 2022-09-20 12:33:17 +02:00
Jesse Braham
ee7e9bd0a1 Bump version numbers and update dependencies 2022-09-13 21:01:08 +02:00
Juraj Sadel
3ebfbc44c3 ADC: Add compile time check for using unconfigured PIN, add AdcPin wrapper around PIN 2022-09-13 08:41:04 +02:00
9names
c896e6c8d2 Fixed defmt on direct-boot mode 2022-09-07 06:20:24 +02:00
Juraj Sadel
f11a23dddb Make it impossible to create multiple instances of LEDC 2022-09-06 11:37:05 +02:00
har7an
8b9fd8b7a0
embedded-hal SpiDevice on all esp32 variants (#106)
* WIP: common/spi: Implement `SpiDevice`

to get shared access to an SPI bus directly via the HAL.

* WIP: common/spi: add SpiBusDevice::new

to create instances via a function call.

* esp32/examples: Add example for spi device trait

* common/spi: Finish "SpiDevice" implementation

for esp32. Abandons the approach of having the user pass in some generic
mutex in favor of creating the Mutex as part of the API so it isn't
exposed to the user in the first place.

* common/spi: Add more thorough docs

* esp32/examples: Fix example for eh1 "SpiDevice"

* common/spi: Implement `SpiDevice` for xtensa arch

and move the code into a submodule that is fenced with conditional
compilation directives.

* esp32/examples: Update spi device example

to the changed APIs for the timers and clocks, and add more transmission
tests to the example code.

* common/spi: Create devices from buscontroller

directly, instead of offering only the `new` method.

* common/spi: Finish `SpiBusDevice` trait

from embedded-hal 1.0.0-alpha.8.

* esp32: Update `SpiBusDevice` usage example.

* common/spi: Fix mutex types for xtensa32 esp

because the esp32/esp32s3 can use `SpinLockMutex`, whereas the esp32s2
has access only to `CriticalSectionMutex`.

* common/spi: Implement `SpiBusDevice` for riscv

based esp32c3.

* general: Add examples for spi device loopback

to all esp variants.

* common: Use esp_backtrace in spi_eh1_device examples

* common/spi: Update module documentation.

* common/spi: Use `critical_section::Mutex`

to unify locking across all esp variants.

* esp32c3-hal: Fix spi device example

* esp32c3/examples: Fix typo in used spi pins

Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>

Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>
2022-08-30 06:55:53 -07:00