har7an 8b9fd8b7a0
embedded-hal SpiDevice on all esp32 variants (#106)
* WIP: common/spi: Implement `SpiDevice`

to get shared access to an SPI bus directly via the HAL.

* WIP: common/spi: add SpiBusDevice::new

to create instances via a function call.

* esp32/examples: Add example for spi device trait

* common/spi: Finish "SpiDevice" implementation

for esp32. Abandons the approach of having the user pass in some generic
mutex in favor of creating the Mutex as part of the API so it isn't
exposed to the user in the first place.

* common/spi: Add more thorough docs

* esp32/examples: Fix example for eh1 "SpiDevice"

* common/spi: Implement `SpiDevice` for xtensa arch

and move the code into a submodule that is fenced with conditional
compilation directives.

* esp32/examples: Update spi device example

to the changed APIs for the timers and clocks, and add more transmission
tests to the example code.

* common/spi: Create devices from buscontroller

directly, instead of offering only the `new` method.

* common/spi: Finish `SpiBusDevice` trait

from embedded-hal 1.0.0-alpha.8.

* esp32: Update `SpiBusDevice` usage example.

* common/spi: Fix mutex types for xtensa32 esp

because the esp32/esp32s3 can use `SpinLockMutex`, whereas the esp32s2
has access only to `CriticalSectionMutex`.

* common/spi: Implement `SpiBusDevice` for riscv

based esp32c3.

* general: Add examples for spi device loopback

to all esp variants.

* common: Use esp_backtrace in spi_eh1_device examples

* common/spi: Update module documentation.

* common/spi: Use `critical_section::Mutex`

to unify locking across all esp variants.

* esp32c3-hal: Fix spi device example

* esp32c3/examples: Fix typo in used spi pins

Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>

Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>
2022-08-30 06:55:53 -07:00
2021-10-19 15:00:41 -07:00
2021-10-19 15:00:41 -07:00

esp-hal

GitHub Workflow Status MIT/Apache-2.0 licensed Matrix

Hardware Abstraction Layer crates for the ESP32, ESP32-C3, ESP32-S2, and ESP32-S3 from Espressif.

These HALs are no_std; if you are looking for std support please use esp-idf-hal instead.

This project is still in the early stages of development, and as such there should be no expectation of API stability. A significant number of peripherals currently have drivers implemented (you can see a full list here) but have varying levels of functionality. For most basic tasks, this should be usable already.

If you have any questions, comments, or concerns please open an issue, start a new discussion, or join us on Matrix. For additional information regarding any of the crates in this repository please refer to the crate's README.

Crate Target Technical Reference Manual
esp32-hal xtensa-esp32-none-elf ESP32
esp32c3-hal riscv32imc-unknown-none-elf
riscv32imac-unknown-none-elf*
ESP32-C3
esp32s2-hal xtensa-esp32s2-none-elf ESP32-S2
esp32s3-hal xtensa-esp32s3-none-elf ESP32-S3

* via atomic emulation

MSRV

The Minimum Supported Rust Versions are:

  • 1.60.0 for RISC-V devices (ESP32-C3)
  • 1.60.0 for Xtensa devices (ESP32, ESP32-S2, ESP32-S3)

Note that targeting the Xtensa ISA currently requires the use of the esp-rs/rust compiler fork. The esp-rs/rust-build repository has pre-compiled release artifacts for most common platforms, and provides installation scripts to aid you in the process.

RISC-V is officially supported by the official Rust compiler.

License

Licensed under either of:

at your option.

Contribution

Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.

Description
no_std Hardware Abstraction Layers for ESP32 microcontrollers
Readme 110 MiB
Languages
Rust 99.8%
Jinja 0.1%