mirror of
https://github.com/esp-rs/esp-hal.git
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8c64b09ba7
* Clean up with new PAC * Allow configuring longer WDT periods * Enable WDT after updating timeout
288 lines
9.5 KiB
TOML
288 lines
9.5 KiB
TOML
# ESP32-C2 Device Metadata
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#
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# Empty [`device.driver`] tables imply `partial` support status.
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#
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# If you modify a driver support status, run `cargo xtask update-chip-support-table` to
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# update the table in the esp-hal README.
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[device]
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name = "esp32c2"
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arch = "riscv"
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target = "riscv32imc-unknown-none-elf"
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cores = 1
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trm = "https://www.espressif.com/sites/default/files/documentation/esp8684_technical_reference_manual_en.pdf"
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peripherals = [
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{ name = "APB_CTRL" },
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{ name = "APB_SARADC" },
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{ name = "BB" },
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{ name = "ASSIST_DEBUG" },
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{ name = "DMA" },
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{ name = "ECC" },
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{ name = "EFUSE" },
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{ name = "EXTMEM" },
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{ name = "GPIO" },
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{ name = "I2C_ANA_MST" },
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{ name = "I2C0", interrupts = { peri = "I2C_EXT0" } },
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{ name = "INTERRUPT_CORE0" },
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{ name = "IO_MUX" },
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{ name = "LEDC" },
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{ name = "RNG" },
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{ name = "LPWR", pac = "RTC_CNTL" },
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{ name = "MODEM_CLKRST" },
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{ name = "SENSITIVE" },
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{ name = "SHA" },
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{ name = "SPI0" },
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{ name = "SPI1" },
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{ name = "SPI2", interrupts = { peri = "SPI2" } },
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{ name = "SYSTEM" },
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{ name = "SYSTIMER" },
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{ name = "TIMG0" },
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{ name = "UART0", interrupts = { peri = "UART0" } },
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{ name = "UART1", interrupts = { peri = "UART1" } },
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{ name = "XTS_AES" },
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{ name = "DMA_CH0", virtual = true },
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{ name = "ADC1", virtual = true },
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{ name = "BT", virtual = true },
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{ name = "SW_INTERRUPT", virtual = true },
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{ name = "WIFI", virtual = true },
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{ name = "MEM2MEM1", virtual = true },
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{ name = "MEM2MEM2", virtual = true },
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{ name = "MEM2MEM3", virtual = true },
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{ name = "MEM2MEM4", virtual = true },
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{ name = "MEM2MEM5", virtual = true },
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{ name = "MEM2MEM6", virtual = true },
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{ name = "MEM2MEM7", virtual = true },
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{ name = "MEM2MEM8", virtual = true },
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]
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symbols = [
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# Additional peripherals defined by us (the developers):
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"gdma",
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"phy",
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# ROM capabilities
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"rom_crc_le",
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"rom_crc_be",
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"rom_md5_mbedtls",
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# Wakeup SOC based on ESP-IDF:
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"pm_support_wifi_wakeup",
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"pm_support_bt_wakeup",
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"uart_support_wakeup_int",
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"gpio_support_deepsleep_wakeup",
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]
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memory = [{ name = "dram", start = 0x3FCA_0000, end = 0x3FCE_0000 }]
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[device.adc]
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support_status = "partial"
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instances = [
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{ name = "adc1" },
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]
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[device.assist_debug]
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support_status = "partial"
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has_sp_monitor = true
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[device.gpio]
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support_status = "supported"
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gpio_function = 1
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constant_0_input = 0x1f
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constant_1_input = 0x1e
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pins = [
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{ pin = 0, analog = { 1 = "ADC1_CH0" }, rtc = { 0 = "RTC_GPIO0" } },
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{ pin = 1, analog = { 1 = "ADC1_CH1" }, rtc = { 0 = "RTC_GPIO1" } },
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{ pin = 2, functions = { 2 = "FSPIQ" }, analog = { 1 = "ADC1_CH2" }, rtc = { 0 = "RTC_GPIO2" } },
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{ pin = 3, analog = { 1 = "ADC1_CH3" }, rtc = { 0 = "RTC_GPIO3" } },
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{ pin = 4, functions = { 0 = "MTMS", 2 = "FSPIHD" }, analog = { 1 = "ADC1_CH4" }, rtc = { 0 = "RTC_GPIO4" } },
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{ pin = 5, functions = { 0 = "MTDI", 2 = "FSPIWP" }, rtc = { 0 = "RTC_GPIO5" } },
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{ pin = 6, functions = { 0 = "MTCK", 2 = "FSPICLK" } },
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{ pin = 7, functions = { 0 = "MTDO", 2 = "FSPID" } },
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{ pin = 8 },
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{ pin = 9 },
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{ pin = 10 }, # Available without SiP flash
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{ pin = 11, functions = { 0 = "SPIHD" } }, # Available without SiP flash
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{ pin = 12, functions = { 0 = "SPIHD" } }, # Available without SiP flash
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{ pin = 13, functions = { 0 = "SPIWP" } }, # Available without SiP flash
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{ pin = 14, functions = { 0 = "SPICS0" } }, # Available without SiP flash
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{ pin = 15, functions = { 0 = "SPICLK" } }, # Available without SiP flash
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{ pin = 16, functions = { 0 = "SPID" } }, # Available without SiP flash
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{ pin = 17, functions = { 0 = "SPIQ" } }, # Available without SiP flash
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{ pin = 18 },
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{ pin = 19, functions = { 0 = "U0RXD" } },
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{ pin = 20, functions = { 0 = "U0TXD" } },
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]
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input_signals = [
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{ name = "SPIQ", id = 0 },
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{ name = "SPID", id = 1 },
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{ name = "SPIHD", id = 2 },
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{ name = "SPIWP", id = 3 },
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{ name = "U0RXD", id = 6 },
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{ name = "U0CTS", id = 7 },
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{ name = "U0DSR", id = 8 },
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{ name = "U1RXD", id = 9 },
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{ name = "U1CTS", id = 10 },
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{ name = "U1DSR", id = 11 },
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{ name = "CPU_GPIO_0", id = 28 },
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{ name = "CPU_GPIO_1", id = 29 },
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{ name = "CPU_GPIO_2", id = 30 },
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{ name = "CPU_GPIO_3", id = 31 },
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{ name = "CPU_GPIO_4", id = 32 },
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{ name = "CPU_GPIO_5", id = 33 },
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{ name = "CPU_GPIO_6", id = 34 },
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{ name = "CPU_GPIO_7", id = 35 },
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{ name = "EXT_ADC_START", id = 45 },
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{ name = "RMT_SIG_0", id = 51 },
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{ name = "RMT_SIG_1", id = 52 },
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{ name = "I2CEXT0_SCL", id = 53 },
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{ name = "I2CEXT0_SDA", id = 54 },
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{ name = "FSPICLK", id = 63 },
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{ name = "FSPIQ", id = 64 },
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{ name = "FSPID", id = 65 },
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{ name = "FSPIHD", id = 66 },
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{ name = "FSPIWP", id = 67 },
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{ name = "FSPICS0", id = 68 },
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{ name = "SIG_FUNC_97", id = 97 },
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{ name = "SIG_FUNC_98", id = 98 },
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{ name = "SIG_FUNC_99", id = 99 },
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{ name = "SIG_FUNC_100", id = 100 },
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{ name = "MTCK" },
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{ name = "MTMS" },
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{ name = "MTDI" },
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]
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output_signals = [
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{ name = "SPIQ", id = 0 },
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{ name = "SPID", id = 1 },
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{ name = "SPIHD", id = 2 },
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{ name = "SPIWP", id = 3 },
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{ name = "SPICLK", id = 4 },
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{ name = "SPICS0", id = 5 },
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{ name = "U0TXD", id = 6 },
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{ name = "U0RTS", id = 7 },
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{ name = "U0DTR", id = 8 },
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{ name = "U1TXD", id = 9 },
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{ name = "U1RTS", id = 10 },
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{ name = "U1DTR", id = 11 },
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{ name = "SPIQ_MONITOR", id = 15 },
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{ name = "SPID_MONITOR", id = 16 },
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{ name = "SPIHD_MONITOR", id = 17 },
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{ name = "SPIWP_MONITOR", id = 18 },
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{ name = "SPICS1", id = 19 },
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{ name = "CPU_GPIO_0", id = 28 },
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{ name = "CPU_GPIO_1", id = 29 },
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{ name = "CPU_GPIO_2", id = 30 },
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{ name = "CPU_GPIO_3", id = 31 },
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{ name = "CPU_GPIO_4", id = 32 },
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{ name = "CPU_GPIO_5", id = 33 },
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{ name = "CPU_GPIO_6", id = 34 },
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{ name = "CPU_GPIO_7", id = 35 },
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{ name = "LEDC_LS_SIG0", id = 45 },
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{ name = "LEDC_LS_SIG1", id = 46 },
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{ name = "LEDC_LS_SIG2", id = 47 },
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{ name = "LEDC_LS_SIG3", id = 48 },
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{ name = "LEDC_LS_SIG4", id = 49 },
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{ name = "LEDC_LS_SIG5", id = 50 },
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{ name = "RMT_SIG_0", id = 51 },
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{ name = "RMT_SIG_1", id = 52 },
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{ name = "I2CEXT0_SCL", id = 53 },
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{ name = "I2CEXT0_SDA", id = 54 },
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{ name = "FSPICLK", id = 63 },
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{ name = "FSPIQ", id = 64 },
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{ name = "FSPID", id = 65 },
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{ name = "FSPIHD", id = 66 },
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{ name = "FSPIWP", id = 67 },
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{ name = "FSPICS0", id = 68 },
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{ name = "FSPICS1", id = 69 },
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{ name = "FSPICS3", id = 70 },
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{ name = "FSPICS2", id = 71 },
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{ name = "FSPICS4", id = 72 },
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{ name = "FSPICS5", id = 73 },
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{ name = "ANT_SEL0", id = 89 },
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{ name = "ANT_SEL1", id = 90 },
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{ name = "ANT_SEL2", id = 91 },
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{ name = "ANT_SEL3", id = 92 },
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{ name = "ANT_SEL4", id = 93 },
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{ name = "ANT_SEL5", id = 94 },
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{ name = "ANT_SEL6", id = 95 },
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{ name = "ANT_SEL7", id = 96 },
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{ name = "SIG_FUNC_97", id = 97 },
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{ name = "SIG_FUNC_98", id = 98 },
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{ name = "SIG_FUNC_99", id = 99 },
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{ name = "SIG_FUNC_100", id = 100 },
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{ name = "CLK_OUT1", id = 123 },
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{ name = "CLK_OUT2", id = 124 },
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{ name = "CLK_OUT3", id = 125 },
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{ name = "GPIO", id = 128 },
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{ name = "MTDO" },
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]
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[device.i2c_master]
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support_status = "supported"
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instances = [
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{ name = "i2c0", sys_instance = "I2cExt0", scl = "I2CEXT0_SCL", sda = "I2CEXT0_SDA" },
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]
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has_fsm_timeouts = true
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has_hw_bus_clear = true
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ll_intr_mask = 0x3ffff
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fifo_size = 16
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has_bus_timeout_enable = true
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max_bus_timeout = 0x1F
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has_conf_update = true
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has_arbitration_en = true
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has_tx_fifo_watermark = true
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bus_timeout_is_exponential = true
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[device.interrupts]
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support_status = "partial"
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status_registers = 2
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[device.spi_master]
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support_status = "supported"
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instances = [
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{ name = "spi2", sys_instance = "Spi2", sclk = "FSPICLK", sio = ["FSPID", "FSPIQ", "FSPIWP", "FSPIHD"], cs = ["FSPICS0", "FSPICS1", "FSPICS2", "FSPICS3", "FSPICS4", "FSPICS5"] },
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]
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[device.spi_slave]
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instances = [
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{ name = "spi2", sys_instance = "Spi2", sclk = "FSPICLK", mosi = "FSPID", miso = "FSPIQ", cs = "FSPICS0" },
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]
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[device.timergroup]
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instances = [{ name = "timg0" }]
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timg_has_divcnt_rst = true
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[device.uart]
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support_status = "supported"
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instances = [
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{ name = "uart0", sys_instance = "Uart0", tx = "U0TXD", rx = "U0RXD", cts = "U0CTS", rts = "U0RTS" },
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{ name = "uart1", sys_instance = "Uart1", tx = "U1TXD", rx = "U1RXD", cts = "U1CTS", rts = "U1RTS" },
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]
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ram_size = 128
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# Other drivers which are partially supported but have no other configuration:
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## Crypto
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# [device.aes] Product portfolio lists AES, but TRM only has XTS_AES?
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[device.ecc]
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[device.sha]
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[device.rng]
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## Interfaces
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[device.ledc]
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## Miscellaneous
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[device.dma]
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[device.io_mux]
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[device.temp_sensor]
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[device.sleep]
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[device.systimer]
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## Radio
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[device.wifi]
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[device.bt]
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