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60 lines
3.6 KiB
Markdown
60 lines
3.6 KiB
Markdown
# esp-hal
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[](https://matrix.to/#/#esp-rs:matrix.org)
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**H**ardware **A**bstraction **L**ayer crates for the **ESP32**, **ESP32-C3**, **ESP32-S2**, and **ESP32-S3** from Espressif.
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This project is still in the early stages of development, and as such there should be no expectation of API stability. Only a small number of peripherals currently have drivers implemented (you can see a full list [here]) and out of those most are still incomplete, albeit functional. These HALs are `no_std`; if you are looking for `std` support please use [esp-idf-hal] instead.
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If you have any questions, comments, or concerns please join us on [Matrix]. For additional information regarding any of the crates in the monorepo, please refer to the crate's README.
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| Crate | Target | Technical Reference Manual |
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| :-----------: | :-----------------------------------------------------------------: | :------------------------: |
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| [esp32-hal] | `xtensa-esp32-none-elf` | [ESP32] |
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| [esp32c3-hal] | `riscv32imc-unknown-none-elf`<br />`riscv32imac-unknown-none-elf`\* | [ESP32-C3] |
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| [esp32s2-hal] | `xtensa-esp32s2-none-elf` | [ESP32-S2] |
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| [esp32s3-hal] | `xtensa-esp32s3-none-elf` | [ESP32-S3] |
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_\* via [atomic emulation]_
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[here]: https://github.com/esp-rs/esp-hal/issues/19
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[esp-idf-hal]: https://github.com/esp-rs/esp-idf-hal
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[matrix]: https://matrix.to/#/#esp-rs:matrix.org
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[esp32-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32-hal
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[esp32c3-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32c3-hal
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[esp32s2-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32s2-hal
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[esp32s3-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32s3-hal
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[esp32]: https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf
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[esp32-c3]: https://www.espressif.com/sites/default/files/documentation/esp32-c3_technical_reference_manual_en.pdf
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[esp32-s2]: https://www.espressif.com/sites/default/files/documentation/esp32-s2_technical_reference_manual_en.pdf
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[esp32-s3]: https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf
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[atomic emulation]: https://github.com/esp-rs/riscv-atomic-emulation-trap
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## MSRV
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The **M**inimum **S**upported **R**ust **V**ersions are:
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- `1.59.0` for RISC-V devices (**ESP32-C3**)
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- `1.59.0` for Xtensa devices (**ESP32**, **ESP32-S2**, **ESP32-S3**)
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Note that targeting the Xtensa ISA requires the use of the [esp-rs/rust] compiler fork, whereas RISC-V is officially supported by the official Rust compiler.
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[esp-rs/rust]: https://github.com/esp-rs/rust
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## License
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Licensed under either of:
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- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or http://www.apache.org/licenses/LICENSE-2.0)
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- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)
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at your option.
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### Contribution
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Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in
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the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without
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any additional terms or conditions.
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