mirror of
https://github.com/esp-rs/esp-hal.git
synced 2025-09-27 20:30:35 +00:00
9eadaa147f
* fix(esp-hal/ld): adjust esp32s2 SRAM size from 188K to 184K * fix(esp-hal/ld): extend esp32s2 heap size from 130.5K to 136K * fix(esp-hal/ld): reduce esp32s3 SRAM size with 1K * docs(changelog): add esp-rs#3709 entry
64 lines
1.6 KiB
Rust
64 lines
1.6 KiB
Rust
//! Tests that the `-Zstack-protector=all` works as expected.
|
|
//!
|
|
//! The stack protector is enabled by setting HIL_ENABLE_STACK_PROTECTOR. The
|
|
//! xtask recognizes this and sets the cargo config to `.cargo/config_spp.toml`,
|
|
//! which enables the feature.
|
|
|
|
//% CARGO-CONFIG: target.'cfg(target_arch = "riscv32")'.rustflags = [ "-Z", "stack-protector=all" ]
|
|
//% CARGO-CONFIG: target.'cfg(target_arch = "xtensa")'.rustflags = [ "-Z", "stack-protector=all" ]
|
|
//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
|
|
//% FEATURES: esp-alloc
|
|
|
|
#![no_std]
|
|
#![no_main]
|
|
|
|
use hil_test as _;
|
|
|
|
#[inline(never)]
|
|
fn trigger_overflow() {
|
|
// Aim for the middle of heap: these are roughly DRAM_LEN - 16k
|
|
const SIZE: usize = if cfg!(esp32) {
|
|
160 * 1024
|
|
} else if cfg!(esp32c2) {
|
|
176 * 1024
|
|
} else if cfg!(esp32c3) {
|
|
297 * 1024
|
|
} else if cfg!(esp32c6) {
|
|
425 * 1024
|
|
} else if cfg!(esp32h2) {
|
|
235 * 1024
|
|
} else if cfg!(esp32s2) {
|
|
169 * 1024
|
|
} else if cfg!(esp32s3) {
|
|
322 * 1024
|
|
} else {
|
|
unreachable!()
|
|
};
|
|
let mut stack = core::hint::black_box([0u8; SIZE]);
|
|
stack[SIZE - 1] = 42;
|
|
}
|
|
|
|
#[cfg(test)]
|
|
#[embedded_test::tests(default_timeout = 3)]
|
|
mod tests {
|
|
use super::*;
|
|
|
|
#[init]
|
|
fn init() {
|
|
let _ = esp_hal::init(esp_hal::Config::default());
|
|
// Have some data that we can overflow into.
|
|
esp_alloc::heap_allocator!(size: 32 * 1024);
|
|
}
|
|
|
|
#[test]
|
|
fn should_be_ok() {
|
|
assert_eq!(1 + 1, 2);
|
|
}
|
|
|
|
#[test]
|
|
#[should_panic]
|
|
fn should_trigger_panic() {
|
|
trigger_overflow();
|
|
}
|
|
}
|