mirror of
https://github.com/esp-rs/esp-hal.git
synced 2025-09-28 12:50:53 +00:00
Make sure that HAL users don't need to depend on esp-hal-common
This commit is contained in:
parent
918f7a7c8e
commit
9c244ba16c
@ -1,17 +1,15 @@
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//! GPIO driver
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//! GPIO Types
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//!
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//! Defines a series of macros which allow for the definition of each chip's
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//! GPIO pins in a generic manner. Implements the various traits defined by
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//! [embedded-hal].
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//!
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//! [embedded-hal]: https://docs.rs/embedded-hal/latest/embedded_hal/
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//! Various traits and enums to work with GPIO
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use core::marker::PhantomData;
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#[doc(hidden)]
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pub use paste::paste;
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use crate::pac::GPIO;
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#[doc(hidden)]
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#[cfg_attr(feature = "esp32", path = "gpio/esp32.rs")]
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#[cfg_attr(feature = "esp32c3", path = "gpio/esp32c3.rs")]
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#[cfg_attr(feature = "esp32s2", path = "gpio/esp32s2.rs")]
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@ -182,9 +180,12 @@ pub trait OutputPin: Pin {
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fn internal_pull_down(&mut self, on: bool) -> &mut Self;
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}
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#[doc(hidden)]
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pub struct SingleCoreInteruptStatusRegisterAccess {}
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#[doc(hidden)]
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pub struct DualCoreInteruptStatusRegisterAccess {}
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#[doc(hidden)]
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pub trait InteruptStatusRegisterAccess {
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fn pro_cpu_interrupt_status_read() -> u32;
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@ -236,6 +237,7 @@ impl InteruptStatusRegisterAccess for DualCoreInteruptStatusRegisterAccess {
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}
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}
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#[doc(hidden)]
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pub trait InterruptStatusRegisters<RegisterAccess>
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where
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RegisterAccess: InteruptStatusRegisterAccess,
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@ -257,9 +259,12 @@ where
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}
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}
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#[doc(hidden)]
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pub struct Bank0GpioRegisterAccess {}
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#[doc(hidden)]
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pub struct Bank1GpioRegisterAccess {}
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#[doc(hidden)]
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pub trait BankGpioRegisterAccess {
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fn write_out_en_clear(word: u32);
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@ -316,6 +321,7 @@ impl BankGpioRegisterAccess for Bank0GpioRegisterAccess {
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}
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}
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#[doc(hidden)]
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#[cfg(not(feature = "esp32c3"))]
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impl BankGpioRegisterAccess for Bank1GpioRegisterAccess {
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fn write_out_en_clear(word: u32) {
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@ -357,6 +363,7 @@ impl BankGpioRegisterAccess for Bank1GpioRegisterAccess {
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}
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}
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#[doc(hidden)]
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pub trait GpioRegisters<RegisterAccess>
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where
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RegisterAccess: BankGpioRegisterAccess,
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@ -390,6 +397,7 @@ where
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}
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}
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#[doc(hidden)]
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pub fn connect_low_to_peripheral(signal: InputSignal) {
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unsafe { &*GPIO::PTR }.func_in_sel_cfg[signal as usize].modify(|_, w| unsafe {
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w.sel()
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@ -401,6 +409,7 @@ pub fn connect_low_to_peripheral(signal: InputSignal) {
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});
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}
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#[doc(hidden)]
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pub fn connect_high_to_peripheral(signal: InputSignal) {
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unsafe { &*GPIO::PTR }.func_in_sel_cfg[signal as usize].modify(|_, w| unsafe {
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w.sel()
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@ -413,6 +422,7 @@ pub fn connect_high_to_peripheral(signal: InputSignal) {
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}
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// Only for ESP32 in order to workaround errata 3.6
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#[doc(hidden)]
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#[macro_export]
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macro_rules! impl_errata36 {
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(None, $pull_down:expr, $pull_up:expr) => {
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@ -476,6 +486,7 @@ macro_rules! impl_errata36 {
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};
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}
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#[doc(hidden)]
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#[macro_export]
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macro_rules! impl_input {
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(
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@ -689,6 +700,7 @@ macro_rules! impl_input {
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};
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}
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#[doc(hidden)]
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#[macro_export]
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macro_rules! impl_output {
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(
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@ -923,6 +935,7 @@ macro_rules! impl_output {
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};
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}
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#[doc(hidden)]
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#[macro_export]
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macro_rules! impl_output_wrap {
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(
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@ -949,6 +962,7 @@ macro_rules! impl_output_wrap {
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) => {};
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}
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#[doc(hidden)]
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#[macro_export]
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macro_rules! impl_gpio_register_access {
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(Bank0, $pxi:ident) => {
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@ -962,6 +976,7 @@ macro_rules! impl_gpio_register_access {
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};
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}
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#[doc(hidden)]
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#[macro_export]
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macro_rules! impl_interrupt_status_register_access {
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(SingleCore, $pxi:ident) => {
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@ -975,6 +990,7 @@ macro_rules! impl_interrupt_status_register_access {
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};
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}
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#[doc(hidden)]
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#[macro_export]
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macro_rules! gpio {
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(
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@ -6,20 +6,16 @@ use core::{cell::RefCell, fmt::Write};
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use esp32_hal::{
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clock::ClockControl,
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gpio::{Gpio0, IO},
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gpio_types::{Event, Input, Pin, PullDown},
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interrupt,
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pac::{self, Peripherals, UART0},
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prelude::*,
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Cpu,
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Delay,
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RtcCntl,
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Serial,
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Timer,
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};
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use esp_hal_common::{
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gpio::{Event, Pin},
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interrupt,
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Cpu,
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Input,
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PullDown,
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};
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use panic_halt as _;
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use xtensa_lx::mutex::{Mutex, SpinLockMutex};
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use xtensa_lx_rt::entry;
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@ -4,13 +4,14 @@
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use core::{cell::RefCell, fmt::Write};
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use esp32_hal::{
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interrupt,
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pac::{self, Peripherals, TIMG0, TIMG1, UART0},
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prelude::*,
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Cpu,
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RtcCntl,
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Serial,
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Timer,
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};
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use esp_hal_common::{interrupt, Cpu};
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use panic_halt as _;
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use xtensa_lx::mutex::{Mutex, SpinLockMutex};
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use xtensa_lx_rt::entry;
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@ -1,3 +1,13 @@
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//! General Purpose I/Os
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//!
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//! To get access to the pins, you first need to convert them into a HAL
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//! designed struct from the pac struct `GPIO` and `IO_MUX` using `IO::new`.
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//!
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//! ```no_run
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//! let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
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//! let mut led = io.pins.gpio5.into_push_pull_output();
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//! ```
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use esp_hal_common::gpio::{types::*, *};
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gpio! {
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@ -3,6 +3,7 @@
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pub use embedded_hal as ehal;
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pub use esp_hal_common::{
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clock,
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gpio as gpio_types,
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i2c,
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interrupt,
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pac,
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@ -7,21 +7,16 @@ use bare_metal::Mutex;
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use esp32c3_hal::{
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clock::ClockControl,
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gpio::{Gpio9, IO},
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gpio_types::{Event, Input, Pin, PullDown},
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interrupt,
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pac::{self, Peripherals, UART0},
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prelude::*,
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Cpu,
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Delay,
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RtcCntl,
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Serial,
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Timer,
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};
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use esp_hal_common::{
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interrupt::{self},
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Cpu,
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Event,
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Input,
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Pin,
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PullDown,
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};
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use panic_halt as _;
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use riscv_rt::entry;
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@ -5,17 +5,15 @@ use core::{cell::RefCell, fmt::Write};
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use bare_metal::Mutex;
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use esp32c3_hal::{
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interrupt,
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pac::{self, Peripherals, UART0},
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prelude::*,
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systimer::{Alarm, SystemTimer, Target},
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Cpu,
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RtcCntl,
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Serial,
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Timer,
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};
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use esp_hal_common::{
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interrupt::{self},
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systimer::{Alarm, SystemTimer, Target},
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Cpu,
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};
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use panic_halt as _;
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use riscv_rt::entry;
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@ -5,16 +5,14 @@ use core::{cell::RefCell, fmt::Write};
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use bare_metal::Mutex;
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use esp32c3_hal::{
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interrupt,
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pac::{self, Peripherals, TIMG0, TIMG1, UART0},
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prelude::*,
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Cpu,
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RtcCntl,
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Serial,
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Timer,
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};
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use esp_hal_common::{
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interrupt::{self},
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Cpu,
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};
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use panic_halt as _;
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use riscv_rt::entry;
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@ -1,3 +1,12 @@
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//! General Purpose I/Os
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//!
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//! To get access to the pins, you first need to convert them into a HAL
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//! designed struct from the pac struct `GPIO` and `IO_MUX` using `IO::new`.
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//!
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//! ```no_run
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//! let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
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//! let mut led = io.pins.gpio5.into_push_pull_output();
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//! ```
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use esp_hal_common::gpio::{types::*, *};
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gpio! {
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@ -5,6 +5,7 @@ use core::arch::global_asm;
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pub use embedded_hal as ehal;
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pub use esp_hal_common::{
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clock,
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gpio as gpio_types,
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i2c,
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interrupt,
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pac,
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@ -6,20 +6,16 @@ use core::{cell::RefCell, fmt::Write};
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use esp32s2_hal::{
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clock::ClockControl,
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gpio::{Gpio0, IO},
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gpio_types::{Event, Input, Pin, PullDown},
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interrupt,
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pac::{self, Peripherals, UART0},
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prelude::*,
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Cpu,
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Delay,
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RtcCntl,
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Serial,
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Timer,
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};
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use esp_hal_common::{
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gpio::{Event, Pin},
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interrupt,
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Cpu,
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Input,
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PullDown,
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};
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use panic_halt as _;
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use xtensa_lx::mutex::{CriticalSectionMutex, Mutex};
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use xtensa_lx_rt::entry;
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@ -5,20 +5,18 @@ use core::{cell::RefCell, fmt::Write};
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use esp32s2_hal::{
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clock::ClockControl,
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interrupt,
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pac::{self, Peripherals, UART0},
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prelude::*,
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systimer::{Alarm, SystemTimer, Target},
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Cpu,
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Delay,
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RtcCntl,
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Serial,
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Timer,
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};
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use esp_hal_common::{
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interrupt,
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Cpu,
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systimer::{SystemTimer, Alarm, Target}
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};
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use panic_halt as _;
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use xtensa_lx::mutex::{Mutex, CriticalSectionMutex};
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use xtensa_lx::mutex::{CriticalSectionMutex, Mutex};
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use xtensa_lx_rt::entry;
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static mut SERIAL: CriticalSectionMutex<RefCell<Option<Serial<UART0>>>> =
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@ -92,7 +90,7 @@ fn main() -> ! {
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let mut delay = Delay::new(&clocks);
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unsafe {
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xtensa_lx::interrupt::enable_mask(1 << 19 | 1 << 0 | 1 << 23 );
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xtensa_lx::interrupt::enable_mask(1 << 19 | 1 << 0 | 1 << 23);
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}
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loop {
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@ -115,7 +113,7 @@ pub fn level1_interrupt() {
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interrupt::CpuInterrupt::Interrupt0LevelPriority1,
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);
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unsafe {
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unsafe {
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(&ALARM0).lock(|data| {
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let mut alarm = data.borrow_mut();
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let alarm = alarm.as_mut().unwrap();
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@ -139,7 +137,7 @@ pub fn level2_interrupt() {
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interrupt::CpuInterrupt::Interrupt19LevelPriority2,
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);
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unsafe {
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unsafe {
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(&ALARM1).lock(|data| {
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let mut alarm = data.borrow_mut();
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let alarm = alarm.as_mut().unwrap();
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@ -163,7 +161,7 @@ pub fn level3_interrupt() {
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interrupt::CpuInterrupt::Interrupt23LevelPriority3,
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);
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unsafe {
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unsafe {
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(&ALARM2).lock(|data| {
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let mut alarm = data.borrow_mut();
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let alarm = alarm.as_mut().unwrap();
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|
@ -4,13 +4,14 @@
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use core::{cell::RefCell, fmt::Write};
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use esp32s2_hal::{
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interrupt,
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pac::{self, Peripherals, TIMG0, TIMG1, UART0},
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prelude::*,
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Cpu,
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RtcCntl,
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Serial,
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Timer,
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};
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use esp_hal_common::{interrupt, Cpu};
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use panic_halt as _;
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use xtensa_lx::mutex::{CriticalSectionMutex, Mutex};
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use xtensa_lx_rt::entry;
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|
@ -1,3 +1,13 @@
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//! General Purpose I/Os
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//!
|
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//! To get access to the pins, you first need to convert them into a HAL
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//! designed struct from the pac struct `GPIO` and `IO_MUX` using `IO::new`.
|
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//!
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//! ```no_run
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//! let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
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//! let mut led = io.pins.gpio5.into_push_pull_output();
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//! ```
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use esp_hal_common::gpio::{types::*, *};
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gpio! {
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|
@ -3,6 +3,7 @@
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pub use embedded_hal as ehal;
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pub use esp_hal_common::{
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clock,
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gpio as gpio_types,
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i2c::{self, I2C},
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interrupt,
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pac,
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@ -10,6 +11,7 @@ pub use esp_hal_common::{
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pulse_control,
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ram,
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spi,
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systimer,
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utils,
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Cpu,
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Delay,
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|
@ -6,20 +6,16 @@ use core::{cell::RefCell, fmt::Write};
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use esp32s3_hal::{
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clock::ClockControl,
|
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gpio::{Gpio0, IO},
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gpio_types::{Event, Input, Pin, PullDown},
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interrupt,
|
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pac::{self, Peripherals, UART0},
|
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prelude::*,
|
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Cpu,
|
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Delay,
|
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RtcCntl,
|
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Serial,
|
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Timer,
|
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};
|
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use esp_hal_common::{
|
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gpio::{Event, Pin},
|
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interrupt,
|
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Cpu,
|
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Input,
|
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PullDown,
|
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};
|
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use panic_halt as _;
|
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use xtensa_lx::mutex::{Mutex, SpinLockMutex};
|
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use xtensa_lx_rt::entry;
|
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|
@ -5,18 +5,16 @@ use core::{cell::RefCell, fmt::Write};
|
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|
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use esp32s3_hal::{
|
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clock::ClockControl,
|
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interrupt,
|
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pac::{self, Peripherals, UART0},
|
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prelude::*,
|
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systimer::{Alarm, SystemTimer, Target},
|
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Cpu,
|
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Delay,
|
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RtcCntl,
|
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Serial,
|
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Timer,
|
||||
};
|
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use esp_hal_common::{
|
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interrupt,
|
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Cpu,
|
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systimer::{SystemTimer, Alarm, Target}
|
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};
|
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use panic_halt as _;
|
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use xtensa_lx::mutex::{Mutex, SpinLockMutex};
|
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use xtensa_lx_rt::entry;
|
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@ -88,7 +86,7 @@ fn main() -> ! {
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let mut delay = Delay::new(&clocks);
|
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|
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unsafe {
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xtensa_lx::interrupt::enable_mask(1 << 19 | 1 << 0 | 1 << 23 );
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xtensa_lx::interrupt::enable_mask(1 << 19 | 1 << 0 | 1 << 23);
|
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}
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loop {
|
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@ -111,7 +109,7 @@ pub fn level1_interrupt() {
|
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interrupt::CpuInterrupt::Interrupt0LevelPriority1,
|
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);
|
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|
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unsafe {
|
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unsafe {
|
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(&ALARM0).lock(|data| {
|
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let mut alarm = data.borrow_mut();
|
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let alarm = alarm.as_mut().unwrap();
|
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@ -135,7 +133,7 @@ pub fn level2_interrupt() {
|
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interrupt::CpuInterrupt::Interrupt19LevelPriority2,
|
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);
|
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|
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unsafe {
|
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unsafe {
|
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(&ALARM1).lock(|data| {
|
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let mut alarm = data.borrow_mut();
|
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let alarm = alarm.as_mut().unwrap();
|
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@ -159,7 +157,7 @@ pub fn level3_interrupt() {
|
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interrupt::CpuInterrupt::Interrupt23LevelPriority3,
|
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);
|
||||
|
||||
unsafe {
|
||||
unsafe {
|
||||
(&ALARM2).lock(|data| {
|
||||
let mut alarm = data.borrow_mut();
|
||||
let alarm = alarm.as_mut().unwrap();
|
||||
|
@ -4,13 +4,14 @@
|
||||
use core::{cell::RefCell, fmt::Write};
|
||||
|
||||
use esp32s3_hal::{
|
||||
interrupt,
|
||||
pac::{self, Peripherals, TIMG0, TIMG1, UART0},
|
||||
prelude::*,
|
||||
Cpu,
|
||||
RtcCntl,
|
||||
Serial,
|
||||
Timer,
|
||||
};
|
||||
use esp_hal_common::{interrupt, Cpu};
|
||||
use panic_halt as _;
|
||||
use xtensa_lx::mutex::{Mutex, SpinLockMutex};
|
||||
use xtensa_lx_rt::entry;
|
||||
|
@ -1,3 +1,13 @@
|
||||
//! General Purpose I/Os
|
||||
//!
|
||||
//! To get access to the pins, you first need to convert them into a HAL
|
||||
//! designed struct from the pac struct `GPIO` and `IO_MUX` using `IO::new`.
|
||||
//!
|
||||
//! ```no_run
|
||||
//! let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
|
||||
//! let mut led = io.pins.gpio5.into_push_pull_output();
|
||||
//! ```
|
||||
|
||||
use esp_hal_common::gpio::{types::*, *};
|
||||
|
||||
// ESP32S3 is a dual-core chip however pro cpu and app cpu shares the same
|
||||
|
@ -3,6 +3,7 @@
|
||||
pub use embedded_hal as ehal;
|
||||
pub use esp_hal_common::{
|
||||
clock,
|
||||
gpio as gpio_types,
|
||||
i2c,
|
||||
interrupt,
|
||||
pac,
|
||||
|
Loading…
x
Reference in New Issue
Block a user