3476 Commits

Author SHA1 Message Date
Per Rosengren
06a1eceaf1 Undo autoformat 2025-09-16 19:24:00 +02:00
Per Rosengren
42c21a24e5 Merge remote-tracking branch 'upstream/main' into adc_v3-enums 2025-09-16 19:17:13 +02:00
Per Rosengren
07e86b23f1 Re-export API enums and update examples 2025-09-16 19:11:13 +02:00
Per Rosengren
4a6d8a3fdf rustfmt 2025-09-16 18:49:24 +02:00
Per Rosengren
ceec07fc94 changelog entry 2025-09-16 18:46:25 +02:00
Per Rosengren
575b27f9f4 ADC v3: Migrate to stm32-data g0 with enums
Also allow separate sample times in read()
2025-09-16 18:11:24 +02:00
goodhoko
97462c07ce Aaaaaand the changelog of course 2025-09-16 14:39:45 +02:00
Brian Schwind
e72e17ded8 Write data with the Ospi peripheral in chunks to respect the max DMA transfer size 2025-09-16 14:28:48 +02:00
goodhoko
9ae76cbad6 Don't forget to update the changelog (again) 2025-09-16 09:49:01 +02:00
goodhoko
8ed1e796ba Handle OSPI address errors
We were using OSPI in indirect mode via DMA and noticed that the transfer future would never resolve. It was forever busy-looping in `finish_dma()` on the `while !regs.sr().read().tcf() {}` line.

After some debugging we noticed that the the `TEF` flag is set. The data sheet says the following about this flag:

> The following errors set the TEF flag in OCTOSPI_SR and generates an interrupt if enabled (TEIE = 1 in OCTOSPI_CR):
> - in indirect or automatic status-polling mode, when a wrong address has been programmed in OCTOSPI_AR (according to the device size defined by DEVSIZE[4:0]).
> - in indirect mode, if the address plus the data length exceed the device size: TEF is set as soon as the access is triggered.

Indeed we were configuring our device size to 0 while specifying a non-zero address.

Detect this condition and return an error early - as soon as we configure the registers (which, according to the data sheet, should be enough to raise the flag)

Also document this behavior on the respective TransferConfig and Config fields.

Testing
-------
See https://github.com/goodhoko/spi-error-test/blob/main/src/main.rs
2025-09-16 09:47:23 +02:00
goodhoko
337da33c7a Also derive for enums that aren't available under my feature-set 2025-09-16 00:57:23 +02:00
goodhoko
759ea1deb9 It's "derive" all the way down 2025-09-16 00:45:48 +02:00
goodhoko
aec887fe0a Don't forget to update the changelog (thanks CI!) 2025-09-16 00:39:22 +02:00
goodhoko
542ae72ca7 Unify derivation of Clone, Copy and defmt::format for all *SPI configs 2025-09-16 00:37:00 +02:00
Dario Nieuwenhuis
dfe5d1bd29
Merge pull request #4664 from phycrax/qspi_gpio_speed
embassy-stm32: Configurable gpio speed for QSPI
2025-09-15 10:50:37 +00:00
Süha Ünüvar
77d8251613 tag config as non exhaustive 2025-09-15 18:44:52 +08:00
dimi
219754ff6c derive Debug and Format for Averaging 2025-09-15 12:21:45 +02:00
Süha Ünüvar
9a4bdec392 update changelog 2025-09-15 18:07:56 +08:00
Süha Ünüvar
db1275358c add gpio speed to qspi config 2025-09-15 18:05:30 +08:00
Brian Schwind
ffe7f6b0a0 Update embassy-stm32/CHANGELOG.md 2025-09-13 00:27:30 +09:00
Brian Schwind
881fee9820 Apply fixes to XSPI as well 2025-09-13 00:13:44 +09:00
Brian Schwind
4a3e9e38e5 Apply fixes to HSPI as well 2025-09-13 00:13:44 +09:00
Brian Schwind
9c4df75940 Set the alternate bytes register to the correct value when configuring an Ospi command 2025-09-13 00:13:44 +09:00
Brian Schwind
a7e1bf2aff Typo fixes 2025-09-13 00:13:05 +09:00
Birk Tjelmeland
88c4274547 stm32/usart: fix blocking flush
The PR in #2416 fixes buffered usart flushing,
but only for the async functions. This commit
introduces the same fixes to the blocking
functions.
2025-09-10 14:00:01 +02:00
Dario Nieuwenhuis
25e0ebf520
Merge pull request #4430 from fwolter/add-f1-remap
Add STM32F1 AFIO remap
2025-09-05 22:45:57 +00:00
Dario Nieuwenhuis
23d5c7efd9 stm32/afio: fix accidentally always using AF number 0 on non-AFIO chips. 2025-09-06 00:39:18 +02:00
Dario Nieuwenhuis
a23c4b7bca stm32/afio: make af_num() unavailable in afio chips. 2025-09-06 00:14:03 +02:00
Dario Nieuwenhuis
35f4ae378c stm32/afio: make the A generic param only appear in chips with AFIO. 2025-09-05 23:44:25 +02:00
Dario Nieuwenhuis
7419b398bf stm32/afio: use type inference for timer remaps as well. 2025-09-05 23:00:31 +02:00
Francisco José Gómez
59af53d53e fix(embassy-stm32): Remove duplicate fn call, vestigial from earlier refcount implementation
Refs: #4577
2025-09-05 15:31:12 -04:00
Fabian Wolter
a6562c4f03 Add STM32F1 AFIO remap 2025-09-05 21:15:46 +02:00
Dario Nieuwenhuis
6438068c16
Merge pull request #4368 from nikvoid/stm32-complementary-pwm-dma
stm32: add `waveform_up` function for complementary PWM too
2025-09-05 16:56:18 +02:00
Dario Nieuwenhuis
4b27444e1c
Merge pull request #4359 from cbaechler/fix/stm32-l0-temperature-channel
embassy-stm32: Fix temperature ADC channel for STM32L0 series
2025-09-05 16:56:07 +02:00
jake-taf
525c7fe1eb OSPI RAM Support
- Make DQSE / SIOO configurable
- Make write instruction configurable
- Fix bug where the address DTR was using the config for the instruction DTR instead of its own
- Configure DQS pin
2025-09-05 16:34:17 +02:00
Francisco José Gómez
46ce5ab697 chore(embassy-stm32): Update changelog
Refs: #4577
2025-09-05 16:28:40 +02:00
Francisco José Gómez
d264c8ab31 fix(embassy-stm32): Prevent dropped DacChannel from disabling Dac peripheral if another DacChannel is still in scope
Fix #4577 by counting references to DacChannel. Modeled after similar code in the `can` module.
2025-09-05 16:28:40 +02:00
Dario Nieuwenhuis
1c2fa92293
Merge pull request #4620 from embassy-rs/lolsai
stm32: add i2s support for all versions, cleanup spi/i2s/sai versions.
2025-09-05 14:13:10 +00:00
Dario Nieuwenhuis
683ca6595f stm32/spi: update for new version numbering, add i2s support for all versions. 2025-09-05 16:01:29 +02:00
Dario Nieuwenhuis
704c294162
Merge branch 'main' into adc_with_clock 2025-09-05 15:29:20 +02:00
Dario Nieuwenhuis
90d403fd0a stm32: peri_v1_bar now enables cfgs peri_v1 and peri_v1_bar. 2025-09-05 15:19:22 +02:00
Dario Nieuwenhuis
60b640bd97 stm32/sai: update for new metapac, simplify cfgs. 2025-09-05 15:19:22 +02:00
Adrian Figueroa
2e2562d8dc fix: ping-pong helper DMA direction 2025-09-05 14:43:43 +02:00
Adrian Figueroa
1e54841632 chore: add changelog entry 2025-09-05 14:43:43 +02:00
elagil
1e627cab29 refactor: make dma implementations match in interface 2025-09-05 14:43:29 +02:00
elagil
db7828538f fix: consolidate naming 2025-09-05 14:43:29 +02:00
elagil
e9783ee28e fix: build 2025-09-05 14:43:29 +02:00
etiennecollin
d3718c6d4e fix: renamed simple table as per ST nomenclature
Co-authored-by: elagil <elagil@takanome.de>
2025-09-05 14:43:29 +02:00
etiennecollin
51e7fafc3c fix: removed unnecessary mut reference 2025-09-05 14:43:29 +02:00
etiennecollin
47bb14514f feat: use register wrappers instead of u32 for LinearItem
Since the register structs are no-field structs with
`repr(transparent)`, we can use them in the LinearItem with `repr(C)`.
This allows the user to call the convenient named setter functions for
the registers instead of manually changing the bits of the u32.
2025-09-05 14:43:29 +02:00