22 Commits

Author SHA1 Message Date
Juraj Sadel
40bf086a0c
Add PeripheralClockControl argument to timg, wdt, sha, usb-serial-jtag and uart constructors (#463)
* PeripheralClockControl timer

* Add PeripheralClockControl to timg, wdt, sha, usb-serial-jtag and uart

* ESP32 updated examples

* ESP32C2 updated examples

* ESP32C3 updated examples

* ESP32S2 updated examples

* ESP32S3 updated examples

* ESP32C6 updated examples

* cargo fmt
2023-03-31 09:51:34 +02:00
Björn Quentin
4e88e48bbe
Remove unnecessary rt crate dependencies (#391)
* Remove unnecessary `rt` crate dependencies

* Bump versions, update to latest released dependencies
2023-02-10 07:24:12 -08:00
Scott Mabin
248fb356f8
PeripheralRef init: uart (#272)
* Add the peripheral module plus some helper macros in preparation

* peripheral macro

* Add peripheral generation macro

* Fixes after rebase

* Update the signature of Peripherals::take

* syncronise hello world example

* fmt the entire repo

Co-authored-by: Jesse Braham <jesse@beta7.io>
2022-12-12 14:45:33 +00:00
bjoernQ
878bbc4c0c GPIO module refactoring 2022-11-29 12:03:04 +01:00
icedrocket
177d278223
Add more trait re-exports to prelude module (#260)
* Add more trait re-exports to prelude module

* Don't expose usb_serial_jtag module

* Add missing system module re-exports
2022-11-23 07:24:47 -08:00
Scott Mabin
9064177e99
Initial embassy support (#225)
* wip: timg embassy driver

- read_raw on timg renamed to now()
- timg initialized and stored in static for use in the embassy driver
- timg sets alarm value
- untested whether alarms actually trigger

* TIMG timer driver for esp32, esp32s3

- Adds the timg timer block as a time driver for embassy
- Not enabled on the C3 as it only has one timer block, better to use
  systimer
- s2 example added but can't build due to atomic requirements in
  futures-core

* Add S2 atomic support with emulation, fixup embassy support for the S2

* Move executor & static-cell to dev deps. Make eha optional

* Add c2 support, run fmt

* Update to crates.io embassy releases

* Update eha

* update timg time driver to new trait

* Remove exception feature of esp-backtrace and use the user handler for backtracing

* Add async testing workflow

* Update systick example

* Fix S2 examples

* Update xtensa-toolchain

* set rustflags for s2 target

* Disable systick for esp32s2 until we can fix the noted issues

* review improvements

- Fix intr prio array being off by one
- emabssy time prio interrupt set to max prio
- use cfg instead of feature for systick detection

* Update example time delays
2022-11-09 08:04:38 -08:00
Scott Mabin
be184a552d
critical_section implementations & esp_backtrace (#151)
* CS impl

* use CS Mutex in C3 examples

* use CS Mutex in S2 examples

* Update esp32 example

* run fmt

* Update S3 examples

* Remove uses of unsafe where no longer required

* use esp_backtrace in examples

* fix import & fmt once more

* Bump MSRV to 1.60.0

Co-authored-by: Jesse Braham <jesse@beta7.io>
2022-08-22 20:02:28 +01:00
Gustavo Henrique Nihei
91ea205446
ESP32-C3: Add driver for RTC Watchdog Timer (RWDT) (#134)
* esp32: Fix typo in Frequency word in some identifiers

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* esp32c3: Add support for PLL clock configuration

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* clock: Move definition of Clock types to common level

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* esp32c3: Add support for RTC Clock configuration

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* esp32c3: Add example for the RTC Watchdog Timer driver

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-08 15:36:19 +01:00
bjoernQ
275cede963 Fix LEDC divider calculation, use REF_TICK when needed 2022-08-08 14:41:55 +02:00
Scott Mabin
1d02bf87c3
RISCV vectored interrupts (#118)
* RISCV interrupt vectoring

- Adds support for vectoring peripheral interrupts to PAC handlers
- Currently supports level interrupts with priorities from 1-15
- Updated the gpio interrupt example to reflect the new changes

* remove .vscode files

* Support vectored edge interrupts

This is as simple as making sure we clear the CPU interrupt whenever we
receive one. This also documents further what APIs are safe to call when
the `vectored` feature is enabled.

* fix all examples to use vectoring

* doc & cleanup

* run handlers from ram

* make xtensa::interrupt::vectored private, we rexport public items

* fix default handlers

* pass interrupt into EspDefaultHandler
2022-07-26 09:24:47 -07:00
Scott Mabin
1789780d06
Xtensa vectored interrupts (#103)
* Xtensa interrupt vectoring: peripheral source

- Initial Xtensa vectoring, updated esp32 gpio example to use new interrupt macro.
- Only peripheral sources supported.
- Only level one priority supported.
- CPU & Edge interrupts still need to be handled.

* Xtensa interrupt vectoring: CPU & EDGE

- Add support for handling CPU interrupts and edge interrupts
- PR required to xtensa-lx-rt for CPU handlers

* Xtensa interrupt vectoring: Priority

- Finally implement priortization
- Only three priorities available at the moment. Xtensa programmer guide
  discourages using highpri interrupts in Rust/C. Guide also mentions
  using software priortization to increase the number of Priorities
  available

* support CPU interrupts, using patch xtensa-lx-rt

* Update example

* Add support & examples for the s2 & s3 too

* Fix formatting and missing imports

* Run interrupt handling in ram, optionally run the vector handler in ram in the examples

* Use xtensa_lx::Mutex CS when enabling interrupts

* Run clippy on each target

* Remove redundant features

* Fix C3 builds

* make enable unsafe. Add note about preallocated interrupts in vectored mode.

* Remove `INTERRUPT_LEVELS` static

The interrupt levels static introduces a few issues
  - A lock is needed when configuring interrupts to keep
    INTERRUPT_LEVELS in a consistent state
  - Interrupts enabled from outside the Rust domain wouldn't be
    serviced, this is the case with the wifi blobs

To remove it, the prioty configuration is now calculated dynamically in
the interrupt handler. Essentially INTERRUPT_LEVELS is now created once
the interrupt triggers. It has some benefits, such as only having to
look at interrupts configured on the current core, not both, but there
is of course an overhead with doing this in the interrupt.

* Allow raw interrupts on levels 4-7, whilst also supporting vectoring on levels 1-3

* rename core number features

* Fix examples and formatting

* use xtensa-lx-rt release, update pacs

* Support passing the trap frame into interrupt handlers

* cfg away the #[interrupt] macro when not using vectoring

* rename enable to map

move vectored feature to chip specific hals

* export vectored functions

- rename `enable_with_priority` to `enable`
- add docs for interrupt macro

* Update all examples to use vectored interrupts
2022-07-25 07:12:34 -07:00
bjoernQ
70a9437f27 Add more documentation to the examples 2022-07-22 11:41:58 +02:00
Björn Quentin
147d8de988
Separate TIMG into timer0, (timer1), wdt (#104)
* Separate TIMG into timer0, (timer1), wdt
* Apply suggestions from code review
* Remove left-over code
* Ignore settings.json
2022-07-20 06:51:39 -07:00
Björn Quentin
e612bd1120
Add some config options to the UART driver (#99)
* Add some config options to the UART driver
* Use esp-println 0.2.0
* Remove the NoPin type
* Serial constructor now doesn't return a Result anymore
2022-07-12 08:00:02 -07:00
Jesse Braham
178a05522d Update all examples to reflect changes to Timer API 2022-06-29 17:57:23 -07:00
bjoernQ
9c244ba16c Make sure that HAL users don't need to depend on esp-hal-common 2022-06-13 16:38:58 +02:00
Björn Quentin
3fd4b03144
Add boot-default ClockConfig (#77) 2022-06-09 13:51:17 +01:00
Jesse Braham
ec6a82b3f4 Clean up imports and format all packages 2022-05-05 11:16:05 +02:00
bjoernQ
43c8f34e5f Update xtensa-lx-rt, fix interrupt related examples 2022-04-04 08:52:27 -07:00
Robert Wiewel
f2884bd3b8 Add RWDT disable in RTC_CNTL for ESP32/S2/S3 2022-02-25 23:41:05 +01:00
bjoernQ
181892d02a Fix Xtensa interrupts 2022-02-22 15:33:15 +00:00
bjoernQ
d5938de6c0 GPIO for ESP32S2 2022-02-22 15:33:15 +00:00