MatrixSenpai
9baf5fc5eb
adding compatibility with ws2812 leds that have 4 addressable lights
2025-05-22 10:58:09 -05:00
Matt Johnston
5e49985ed6
embassy-sync: bump to 0.7.0
2025-05-22 13:29:55 +08:00
Dario Nieuwenhuis
3ad9b73dd5
Merge pull request #4193 from embediver/pio-i2s-bit-depth-config
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embassy-rp: Make bit-depth of I2S PIO program configurable
2025-05-18 21:20:24 +02:00
Yuri Astrakhan
ef0f29f0ed
Update defmt dependencies
2025-05-18 20:52:09 +02:00
Dario Nieuwenhuis
e4fc487644
Add rand-core v0.9 support.
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Co-Authored-By: Aurélien Jacobs <aurel@gnuage.org>
2025-05-18 20:35:36 +02:00
Ulf Lilleengen
ee23412d91
Merge pull request #4115 from 1-rafael-1/dropping-pwm-leaves-pins-in-incorrect-state
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pwm: enable pull-down resistors for pins in Drop implementation
2025-05-15 20:08:25 +02:00
Dario Nieuwenhuis
7358eeb49b
Merge pull request #4205 from rursprung/add-some-missing-debug-and-format-impls-for-rpi-adc
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rp: add missing `Debug` and `defmt::Format` `derive`s for ADC
2025-05-15 19:33:56 +02:00
Ralph Ursprung
4a089fe245
rp: add missing Debug and defmt::Format derives for ADC
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this doesn't cover every `struct` & co. in `embassy-rp`, but at least it
adds those needed for `Adc` and `adc::Channel`.
2025-05-15 18:38:04 +02:00
Ralph Ursprung
117eb45fa0
add the possibility to document bind_interrupts structs
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the `bind_interrupts` macro creates a `struct` for the interrupts. it
was so far not possible to document those (except for STM32) and there
was no generic documentation being generated/added either, thus the
`missing_docs` lint was triggered for consumers which enabled it.
with this change it is now possible to manually add a comment on the
`struct` being defined in the macro invocation.
to show that this works one RP example has been modified accordingly.
2025-05-15 18:27:40 +02:00
Dario Nieuwenhuis
5a19b64fec
Merge pull request #4187 from 1-rafael-1/rp235x-overclocking
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RP235x overclocking
2025-05-13 21:45:22 +00:00
Marvin Gudel
edcbfeb152
Make bit-depth of I2S PIO program configurable
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Also the channel argument is removed, since only 2 channels are supported.
2025-05-13 22:36:28 +02:00
1-rafael-1
981ef20f83
removed one line too many
2025-05-13 10:59:11 +02:00
1-rafael-1
1314808b3a
Changes after review: copypasted doc comment fixed and no cfg gates to panic on failing pll config in init()
2025-05-13 10:49:23 +02:00
1-rafael-1
be1b679d48
Refactor CoreVoltage enum, separate for rp2040 and rp235x
2025-05-12 21:42:03 +02:00
1-rafael-1
79e452922a
Add ClockError enum and update system_freq to return Result for error handling
2025-05-12 21:33:47 +02:00
1-rafael-1
133500167c
limit CoreVoltage eum to values up to 1.30V, because we do not support unlocking higher voltages
2025-05-12 09:45:05 +02:00
1-rafael-1
4567beda7b
rp235x overclocking
2025-05-11 17:26:36 +02:00
9names
ee71dda631
Clarify embassy-rp rt feature purpose
2025-05-10 20:03:09 +10:00
Ulf Lilleengen
f9f20ae217
Merge pull request #4155 from marcemmers/remove-instance-from-rp-uart-type
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[embassy-rp] Remove <T: Instance> from Uart and BufferedUart
2025-05-09 19:34:52 +02:00
Ulf Lilleengen
11364077a7
Merge pull request #4150 from 1-rafael-1/rp2040-overclocking
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RP: rp2040 overclocking
2025-05-09 19:34:43 +02:00
1-rafael-1
4621c8aa7a
Clarify comment for CoreVoltage enum regarding V1_20
2025-05-07 22:16:29 +02:00
1-rafael-1
a254daf4ff
Changes after review
2025-05-07 21:19:09 +02:00
1-rafael-1
0d03aa0bec
rework init()
2025-05-05 22:55:09 +02:00
1-rafael-1
3d9cac361e
Add PIO clock divider utility and refactor related modules
2025-05-03 14:46:30 +02:00
1-rafael-1
3441e80507
first batch of changes after review
2025-05-02 23:51:28 +02:00
Marc
d799af9dd8
Replace generic inner with arguments
2025-05-02 13:40:50 +02:00
Marc
407540c8fe
Remove some forgotten commented out code
2025-05-02 13:32:09 +02:00
Marc
2fd803f7c3
Removed instance from uart types
2025-05-02 12:17:35 +02:00
1-rafael-1
c01776a3d7
- two more doc examples test ignored
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- added tests for the new calculations and fixed an overflow issue these tests surfaced.
- Activate brownout detection.
2025-05-01 17:07:48 +02:00
1-rafael-1
22b5f73811
add manual overclock example, finalize API, cleanup
2025-05-01 00:11:56 +02:00
1-rafael-1
d44b945235
Remove unused embassy-rp/sdk examples subproject
2025-04-29 22:49:53 +02:00
1-rafael-1
77e8bc9b28
refactoring to have higher and lower level api
2025-04-29 22:49:05 +02:00
1-rafael-1
3a6dc910ff
first working draft
2025-04-28 22:54:15 +02:00
Luke Rindels
cdef573f52
Enable rp235x trng self-tests by default
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Gracefully handle rp235x trng self-test errors and resets
2025-04-27 15:25:23 -07:00
1-rafael-1
45b7127d61
fmt
2025-04-26 21:55:16 +02:00
1-rafael-1
713d6291d5
Scale clock dividers in HD44780, rotary encoder, and stepper driver based on system clock frequency
2025-04-26 21:54:48 +02:00
1-rafael-1
4ce3bdb370
Add core voltage scaling options and PLL parameter finder for RP2040
2025-04-26 21:54:40 +02:00
Marc
5d8b0e0327
Some small improvements
2025-04-25 01:14:54 +02:00
Marc
2a4b380cb7
Search can use the normal write/read instructions
2025-04-25 01:14:38 +02:00
Marc
29bcddaa10
Refactor Onewire PIO implementation
2025-04-25 01:14:13 +02:00
1-rafael-1
54ef354d21
pwm: enable pull-down resistors for pins in Drop implementation
2025-04-18 23:06:20 +02:00
Dario Nieuwenhuis
c955320e5d
Merge pull request #4093 from 1-rafael-1/rp235x-input-pwm-fix
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Enable input mode for PWM pins on RP235x and disable it on drop
2025-04-15 19:14:19 +02:00
Wez Furlong
a606a1a45a
embassy-rp: impl rand_core::CryptoRng for Trng
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Per discussion in https://github.com/embassy-rs/embassy/pull/3338/files#r2040704590
the Trng implementation satisfies the requirements for CryptoRng,
so it is reasonable to implement this marker trait.
2025-04-14 19:22:33 -07:00
1-rafael-1
dbd7ce4d38
Enable input mode for PWM pins on RP235x and disable it on drop
2025-04-14 22:41:28 +02:00
1-rafael-1
6719e13059
update documentation and examples to mention RP235x
2025-04-13 22:23:07 +02:00
Dario Nieuwenhuis
a23e971d31
Merge pull request #4017 from shilga/SpinlockMutex
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embassy-rp: Spinlock mutex implementation
2025-04-07 23:13:35 +00:00
Sebastian Quilitz
05a6f7a795
embassy-rp: Implementation of a SpinlockMutex
2025-04-07 21:59:36 +02:00
David Brown
c6e16c9e4e
embassy-rp: uart: Increase RX FIFO watermark
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Change the UART RX FIFO depth from 1/8 to 7/8. This should allow for
buffered receipt of uart data with a lower IRQ load.
The PL011 fifo is pretty smart about the fifo, it has an automatic
timeout (which triggers an interrupt) of about 4 characters worth of
time, so setting this threshold doesn't affect the behavior of receipt
of a partially filled fifo.
This should not have any affect on the DMA mode, as the DMA will
generally drain the fifo as data becomes available.
The constraint for the fifo threshold should be determined by expected
interrupt latency. The IRQ needs to be able to drain the fifo before it
fills. As such, the proper threshold depends on system design and data
rate. At full speed (7.8 Mbaud), the remaining 8 characters will come
in in about 10us, which is probably insufficient. But, the time is quite
adequate at lower speeds.
2025-04-07 00:56:24 +02:00
Ulf Lilleengen
b1179c5090
Merge pull request #3983 from mgomez0/topic/buffered-uart-take-pins-before-interrupts
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BufferedUart initialization
2025-04-05 05:36:27 +00:00
Michael Gomez
f1feedf190
BufferedUart initialization
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This change modifies UART initialization throughout Embassy to take pins
before interrupts.
Related to #1304 .
2025-04-04 21:54:36 -07:00
