Dario Nieuwenhuis
1d2f0add77
Merge pull request #4137 from cschuhen/stm32-can-data-len
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Stm32 can data len
2025-04-27 22:58:53 +00:00
Corey Schuhen
eaec6c8165
Make raw_data public.
2025-04-27 17:37:56 +10:00
Thomas Giesel
8b123b4e0d
Fix set_ovsr typo, ramp up to latest stm32-data-generated
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This is an adaption to https://github.com/embassy-rs/stm32-data/pull/597
2025-04-26 19:10:59 +02:00
Dario Nieuwenhuis
572e788b2e
Merge pull request #4132 from GreatKet/main
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Dead-time computation in complementary PWM fixed
2025-04-25 12:51:45 +00:00
Ekaterina Savelyeva
edc585a8ef
Test for dead-time computation corrected
2025-04-25 13:36:38 +04:00
Ekaterina Savelyeva
d1555f4d5f
Dead-time computation in complementary PWM fixed (missing DTG msbs added)
2025-04-25 13:05:48 +04:00
Dion Dokter
f5ab597a07
Logging: Make some things less chatty
2025-04-25 10:53:17 +02:00
Dario Nieuwenhuis
18eea73d19
stm32/adc: add h7rs support.
2025-04-25 00:12:02 +02:00
Thomas Giesel
b32ff0c8f7
Update opamp code to current stm32-metapac
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Some trivial enums have been removed from the OpAmp API in stm32-metapac,
this commit updates the HAL accordingly.
2025-04-24 22:15:41 +02:00
Sebastian Gabrielli
d8631f96d9
Disable SPI before changing config, then re-enable SPI on STM32
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Fixes #2259
2025-04-22 12:47:33 +02:00
Dario Nieuwenhuis
7512c5f14e
stm32: update metapac, cleanup clocks a bit.
2025-04-18 20:32:15 +02:00
Anton Lazarev
11241c579a
derive Clone for hash::Context
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The HASH accelerator can be used for HMAC if a key is provided. One
significant use case of HMAC is as a PRF for the PBKDF2 algorithm, but
this requires that the hashing state can be recursively "branched"
multiple times.
2025-04-18 11:15:24 -07:00
Adam Greig
17d3adac4b
STM32: Fix CAN transmit on bxcan targets
2025-04-18 17:19:21 +01:00
Dario Nieuwenhuis
ca40dc7ff7
Merge pull request #3843 from ost-ing/sdmmc-multiblocks
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STM32 SDMMC multiple block read/write support
2025-04-18 16:09:48 +00:00
Adam Greig
dc3b83f9c8
STM32: Change CAN data() to return slice with correct length
2025-04-18 14:42:16 +01:00
Adam Greig
97172c36b7
STM32: Fix G4 build without defmt feature
2025-04-18 14:41:56 +01:00
Oliver
eb83d049c7
stm32/sdmmc: add support for multiple block reads and writes.
2025-04-18 14:21:29 +02:00
Dario Nieuwenhuis
3ffee5e22b
Merge pull request #3965 from toon23/stm32_usart-pin_config
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Stm32 usart: implement pin config for cts, tx, rts and de
2025-04-18 11:10:00 +00:00
Dario Nieuwenhuis
667400111a
Merge pull request #4089 from IvanLi-CN/g4-opamp
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feat(embassy-stm32/opamp): Add some STM32G4 opamp usage
2025-04-18 11:09:00 +00:00
Josep Angel Oltra
69d2ce4eab
Added USB core_id 0x1000 for STM32
2025-04-17 22:57:13 +02:00
Anton Pöhl
94c208b52a
Stm32 usart: better names for open drain pin modes
2025-04-16 20:42:51 +02:00
ckrenslehner
af755a57ad
fix: stm32wb55 low power feature did not compile
2025-04-15 18:01:46 +02:00
Andreas Galauner
d9f708ca6d
Implement MII for STM32 V1 ethernet peripheral
2025-04-15 04:14:44 +02:00
Dario Nieuwenhuis
dd787c3727
Merge pull request #4090 from diondokter/g4-adc5
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Add the ADC5 to the DMA codegen for the STM32g4x3 and g4x4
2025-04-14 15:52:15 +00:00
Dion Dokter
04dd1d9e77
Add the ADC5 to the DMA codegen for the STM32g4x3 and g4x4
2025-04-14 14:57:28 +02:00
Ivan Li
bbfebf968e
feat(embassy-stm32/opamp): Add some stm32g4 opamp usage
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Signed-off-by: Ivan Li <ivanli2048@gmail.com>
2025-04-14 20:42:46 +08:00
Anton Pöhl
de06406899
Stm32 usart: Remove meaningless pin configurations
2025-04-12 20:56:00 +02:00
Anton Pöhl
eb73cc7cfe
Format
2025-04-11 20:58:03 +02:00
Anton Pöhl
a544726be4
Stm32 usart: remove HalfDuplexConfig
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The pin parameters of usart::Config are used instead.
2025-04-11 20:58:03 +02:00
Anton Pöhl
e3cec4a246
Stm32 usart: make pin modes of cts, tx, rts and de configurable
2025-04-11 20:58:03 +02:00
RichardWGNR
aae3f7fb70
Fix rustfmt #4075
2025-04-11 04:31:32 +05:00
RichardWGNR
4d903a713e
Capability to modify CAN frame data without copying. #4075
2025-04-11 04:27:03 +05:00
RichardWGNR
8fb0186f87
Fix #4062
2025-04-11 00:36:00 +05:00
Dániel Buga
4239a43810
Hand-roll defmt::Format for Hertz
2025-04-08 16:21:41 +02:00
Steven Friedman
bbf2a641dd
remove Hz from log
2025-04-08 09:36:35 -04:00
Steven Friedman
3cb178e78e
Frequency display is now consistent
2025-04-08 09:17:54 -04:00
Dario Nieuwenhuis
9d83955fd5
Merge pull request #4056 from embassy-rs/f1-enable-adc-irq
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stm32/adc: enable interrupt for stm32f1
2025-04-06 23:36:54 +00:00
Dario Nieuwenhuis
1074cc7eaf
stm32/adc: enable interrupt for stm32f1
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Co-Authored-By: Tnze <cjd001113@outlook.com>
2025-04-07 01:04:50 +02:00
Dario Nieuwenhuis
717fbc1cd9
Merge pull request #4016 from antonok-edm/emmc
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Support eMMC devices via SDMMC (STM32)
2025-04-06 22:04:18 +00:00
Dario Nieuwenhuis
5bd610b0de
Merge pull request #4054 from embassy-rs/ringbuffer2
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fix(stm32): handle half-duplex in ringbuffered read
2025-04-06 22:01:34 +00:00
Dario Nieuwenhuis
068b3c90d4
Merge pull request #3922 from antonellocontini/f413-fix-i2s-pll-source-selection
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Fix I2S PLL source selection for F413/F423/F412
2025-04-06 21:58:26 +00:00
Badr Bouslikhin
b0ba604ba5
fix(stm32): handle half-duplex in ringbuffered read
2025-04-06 23:52:39 +02:00
Dario Nieuwenhuis
bdeeb388ff
Merge pull request #4045 from mkj/dev/matt/xspi
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stm32h7rs xspi
2025-04-06 20:35:48 +00:00
Dario Nieuwenhuis
4fec76da28
stm32/timer: update OPM to Peri API.
2025-04-06 22:17:26 +02:00
Dario Nieuwenhuis
5b632e3d03
Merge pull request #4044 from yodaldevoid/stm32-opm-timer
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STM32: One pulse mode timer
2025-04-06 22:09:45 +02:00
Ulf Lilleengen
b1179c5090
Merge pull request #3983 from mgomez0/topic/buffered-uart-take-pins-before-interrupts
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BufferedUart initialization
2025-04-05 05:36:27 +00:00
Michael Gomez
f1feedf190
BufferedUart initialization
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This change modifies UART initialization throughout Embassy to take pins
before interrupts.
Related to #1304 .
2025-04-04 21:54:36 -07:00
Gabriel Smith
f8e5c90266
stm32/timer: Support one pulse mode
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Currently does not support output pins so it really is only useful to
create delayed interrupts based on external signals.
2025-04-04 17:40:22 +00:00
Gabriel Smith
eee2d8c84d
stm32/timer: Merge channel typestate structs
2025-04-04 17:40:15 +00:00
Matt Johnston
5f7da4cfc8
stm32: xspi fixes and consistency
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Fix some incorrect DTR flags, fix _bit vs _Bit inconsistency (copied
from qspi and ospi).
Use the same NCS pullup for all constructors.
xspi is now enabled in PWR register
2025-04-04 17:41:53 +08:00
