Phil-hacker
66a02a4f8d
fix the avr executor
2025-04-08 22:10:17 +02:00
Phil-hacker
1a4b1a9476
update avr_device
2025-04-08 22:07:36 +02:00
Dario Nieuwenhuis
5158482eb9
Merge pull request #4064 from bugadani/hz
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Hand-roll defmt::Format for Hertz
2025-04-08 14:25:33 +00:00
Dániel Buga
4239a43810
Hand-roll defmt::Format for Hertz
2025-04-08 16:21:41 +02:00
Dario Nieuwenhuis
0313089991
Merge pull request #4063 from friedman-ionq/log_hertz
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Frequency display is now consistent
2025-04-08 14:12:34 +00:00
Steven Friedman
bbf2a641dd
remove Hz from log
2025-04-08 09:36:35 -04:00
Steven Friedman
3cb178e78e
Frequency display is now consistent
2025-04-08 09:17:54 -04:00
Dario Nieuwenhuis
a23e971d31
Merge pull request #4017 from shilga/SpinlockMutex
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embassy-rp: Spinlock mutex implementation
2025-04-07 23:13:35 +00:00
Sebastian Quilitz
313328c09a
embassy-rp: add multicore test for SpinlockRawMutex
2025-04-07 21:59:36 +02:00
Sebastian Quilitz
05a6f7a795
embassy-rp: Implementation of a SpinlockMutex
2025-04-07 21:59:36 +02:00
i509VCB
db3179cfb4
Merge pull request #4057 from i509VCB/mspm0-uart-test
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mspm0: add uart tests
2025-04-07 13:22:27 +00:00
Dario Nieuwenhuis
1eec964637
Merge pull request #4046 from outfoxxed/main-macro-executor
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executor: add executor selection to #[embassy_executor::main]
2025-04-07 13:08:33 +00:00
Ulf Lilleengen
cb4d8c74c2
Merge pull request #4058 from embassy-rs/update-bt-hci-v3
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chore: update cyw43 bt-hci version
2025-04-07 08:36:48 +00:00
Ulf Lilleengen
72f72ee15b
chore: update cyw43 bt-hci version
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The new version contains some fixes to hci serialization.
2025-04-07 10:13:42 +02:00
i509VCB
1e23b8114b
mspm0: add uart tests
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This also fixes a bug in the uart clock calculation where it could select an oversampling faster than what the hardware is providing.
2025-04-06 21:15:42 -05:00
outfoxxed
ef8d168df6
executor: add executor selection to #[embassy_executor::main]
2025-04-06 18:52:32 -07:00
Dario Nieuwenhuis
9d83955fd5
Merge pull request #4056 from embassy-rs/f1-enable-adc-irq
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stm32/adc: enable interrupt for stm32f1
2025-04-06 23:36:54 +00:00
Dario Nieuwenhuis
1074cc7eaf
stm32/adc: enable interrupt for stm32f1
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Co-Authored-By: Tnze <cjd001113@outlook.com>
2025-04-07 01:04:50 +02:00
Dario Nieuwenhuis
c7c32739fe
Merge pull request #4055 from embassy-rs/uart-fifo-2
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embassy-rp: uart: Increase RX FIFO watermark
2025-04-06 23:00:35 +00:00
David Brown
c6e16c9e4e
embassy-rp: uart: Increase RX FIFO watermark
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Change the UART RX FIFO depth from 1/8 to 7/8. This should allow for
buffered receipt of uart data with a lower IRQ load.
The PL011 fifo is pretty smart about the fifo, it has an automatic
timeout (which triggers an interrupt) of about 4 characters worth of
time, so setting this threshold doesn't affect the behavior of receipt
of a partially filled fifo.
This should not have any affect on the DMA mode, as the DMA will
generally drain the fifo as data becomes available.
The constraint for the fifo threshold should be determined by expected
interrupt latency. The IRQ needs to be able to drain the fifo before it
fills. As such, the proper threshold depends on system design and data
rate. At full speed (7.8 Mbaud), the remaining 8 characters will come
in in about 10us, which is probably insufficient. But, the time is quite
adequate at lower speeds.
2025-04-07 00:56:24 +02:00
Dario Nieuwenhuis
717fbc1cd9
Merge pull request #4016 from antonok-edm/emmc
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Support eMMC devices via SDMMC (STM32)
2025-04-06 22:04:18 +00:00
Dario Nieuwenhuis
5bd610b0de
Merge pull request #4054 from embassy-rs/ringbuffer2
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fix(stm32): handle half-duplex in ringbuffered read
2025-04-06 22:01:34 +00:00
Dario Nieuwenhuis
068b3c90d4
Merge pull request #3922 from antonellocontini/f413-fix-i2s-pll-source-selection
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Fix I2S PLL source selection for F413/F423/F412
2025-04-06 21:58:26 +00:00
Dario Nieuwenhuis
cee3b49344
Merge pull request #4049 from kaspar030/executor_id
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embassy-executor: introduce `Executor::id()`, `Spawner::executor_id()`
2025-04-06 21:55:04 +00:00
Dario Nieuwenhuis
f7ddac3e0d
Remove flaky test.
2025-04-06 23:52:39 +02:00
Badr Bouslikhin
b0ba604ba5
fix(stm32): handle half-duplex in ringbuffered read
2025-04-06 23:52:39 +02:00
Dario Nieuwenhuis
668f5d42c3
Merge pull request #4027 from bugadani/docs
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Remove task arena FAQ
2025-04-06 23:35:13 +02:00
Dario Nieuwenhuis
a116cc881b
Merge pull request #4052 from bugadani/cs
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embassy-sync, executor/arch-wasm: don't select critical-section impl for std
2025-04-06 22:52:37 +02:00
Dániel Buga
c04b433991
embassy-sync, executor/wasm: don't select critical-section impl for std
2025-04-06 22:43:32 +02:00
Dario Nieuwenhuis
bdeeb388ff
Merge pull request #4045 from mkj/dev/matt/xspi
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stm32h7rs xspi
2025-04-06 20:35:48 +00:00
Dario Nieuwenhuis
518c961b11
Merge pull request #4053 from embassy-rs/stm32-opm-fix
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stm32/timer: update OPM to Peri API.
2025-04-06 22:35:32 +02:00
Dario Nieuwenhuis
4fec76da28
stm32/timer: update OPM to Peri API.
2025-04-06 22:17:26 +02:00
Dario Nieuwenhuis
5b632e3d03
Merge pull request #4044 from yodaldevoid/stm32-opm-timer
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STM32: One pulse mode timer
2025-04-06 22:09:45 +02:00
Dario Nieuwenhuis
f448cfb1df
Merge pull request #4048 from ariel-os/embassy-time-no-std-critical-section
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embassy-time: don't select `critical-section` impl for std
2025-04-06 22:07:20 +02:00
Dario Nieuwenhuis
f9c66c5ad0
Merge pull request #4051 from akeamc/embassy-executor-critical-section-no-std
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embassy-executor: Don't enable critical-section/std for `arch-std`
2025-04-06 22:06:53 +02:00
Åke Amcoff
ac4f4ee807
disable critical-section/std for arch-std in embassy-executor
2025-04-05 18:36:04 +02:00
Ulf Lilleengen
b1179c5090
Merge pull request #3983 from mgomez0/topic/buffered-uart-take-pins-before-interrupts
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BufferedUart initialization
2025-04-05 05:36:27 +00:00
Michael Gomez
f1feedf190
BufferedUart initialization
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This change modifies UART initialization throughout Embassy to take pins
before interrupts.
Related to #1304 .
2025-04-04 21:54:36 -07:00
Kaspar Schleiser
89f3566419
embassy_executor: introduce Spawner::executor_id()
2025-04-04 22:32:55 +02:00
Kaspar Schleiser
3f87ce6f50
embassy-executor: introduce Executor::id()
2025-04-04 22:32:55 +02:00
Kaspar Schleiser
e1e7a5ddb5
embassy-time: don't select critical-section impl for std
2025-04-04 22:07:02 +02:00
Gabriel Smith
f8e5c90266
stm32/timer: Support one pulse mode
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Currently does not support output pins so it really is only useful to
create delayed interrupts based on external signals.
2025-04-04 17:40:22 +00:00
Gabriel Smith
eee2d8c84d
stm32/timer: Merge channel typestate structs
2025-04-04 17:40:15 +00:00
James Munns
61b7762421
Merge pull request #4043 from embassy-rs/james/wake-race
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embassy-rp: defensive change to ensure wakers are registered
2025-04-04 11:45:13 +00:00
Matt Johnston
43ef76b1b6
Add stm32h7rs xpi_memory_mapped example
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Based on ospi_memory_mapped, targetting stm32h7s3 nucleo board.
This works in single mode, no octo mode yet.
2025-04-04 17:41:53 +08:00
Matt Johnston
5f7da4cfc8
stm32: xspi fixes and consistency
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Fix some incorrect DTR flags, fix _bit vs _Bit inconsistency (copied
from qspi and ospi).
Use the same NCS pullup for all constructors.
xspi is now enabled in PWR register
2025-04-04 17:41:53 +08:00
Matt Johnston
6b80f3bada
stm32: xspi: rework switching between ncs1 and ncs2
2025-04-04 17:41:53 +08:00
Matt Johnston
e22fe7cbcf
stm32: xspi wait for prescaler change
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This is documented as being required (and is done by stm32cube),
hasn't been observed as a problem though.
2025-04-04 17:41:53 +08:00
Matt Johnston
65f849a589
stm32: xspi update for Peri
2025-04-04 17:41:53 +08:00
Matt Johnston
36a5b02774
stm32: Update xspi for stm32-metapac changes
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This is now closer to the original ospi, using more idiomatic naming.
Some dead code is removed (previously was hidden by [allow(dead_code)]).
2025-04-04 17:41:52 +08:00
