45 Commits

Author SHA1 Message Date
Jesse Braham
f7830e2750
Reduce duplication, simplify re-exports, and general cleanup/organization (#424)
* Move some linker scripts into `esp-hal-common` and update the build script

* Move `EspDefaultHandler` and `DefaultHandler` definitions into `esp-hal-common`

* Re-export everything from `esp-hal-common`

* Add a couple cfg symbols, cleanup/organize some exports/modules
2023-03-08 06:35:59 -08:00
Jesse Braham
72b9bcb015 Re-export Peripheral 2023-03-07 06:42:29 -08:00
bjoernQ
f385a7dfd2 Make sure to re-export xtensa-lx-rt 2023-02-13 10:09:20 +01:00
Björn Quentin
4e88e48bbe
Remove unnecessary rt crate dependencies (#391)
* Remove unnecessary `rt` crate dependencies

* Bump versions, update to latest released dependencies
2023-02-10 07:24:12 -08:00
mhead
586276fd34 aes accelerator implementation 2023-01-24 10:04:57 -08:00
liebman
ac206af656
pulse counter implementation (#328)
* start of pulse counter implementation

* implement interrupts
implement pcnt for esp32, esp32s2, and esp32s3

* implement pcnt for esp32s2

* fix esp32 PCNT signal names

* update PCNT register/fields for cleaned up PAC

* implement events/get_events (choosing what events interrupt)

* added pcnt example: simple encoder configuration

* restrict pcnt::channel::Channel::new() to super

* PcntPin -> PcntSignal
added range checks for thresholds and limits

* PcntSource is a better name I think

* handle error for PCNT Unit configure() in example

* update pac versions for status register change

* cargo fmt

* cargo fmt (examples)

* PcntSource now only stores the source id.
add a critical section to protect the ctrl & isr_en registers

* cargo fmt
2023-01-17 17:04:22 +00:00
dimpolo
ba43157c5a
enable TWAI on ESP32-S3 (#325)
* enable TWAI on ESP32-S3

* add esp32-s3 TWAI example
2023-01-03 10:02:01 -08:00
Scott Mabin
248fb356f8
PeripheralRef init: uart (#272)
* Add the peripheral module plus some helper macros in preparation

* peripheral macro

* Add peripheral generation macro

* Fixes after rebase

* Update the signature of Peripherals::take

* syncronise hello world example

* fmt the entire repo

Co-authored-by: Jesse Braham <jesse@beta7.io>
2022-12-12 14:45:33 +00:00
Björn Quentin
c46719e112
Merge pull request #255 from dimpolo/mcpwm
MCPWM MVP implementation
2022-12-01 08:34:16 +01:00
dimi
18c7ef7802 WIP MCPWM implementation 2022-11-30 00:55:38 +01:00
bjoernQ
878bbc4c0c GPIO module refactoring 2022-11-29 12:03:04 +01:00
C2D
59d02f5f6e
Add SHA accelerator implementation (#257)
* Add untested basic SHA for esp-sX/cX chips

* Fix ptr type inconsistency for S2

* Add ESP32 impl & fix process_buffer latch issue

* Add debug example for SHA accelerator

* Clean up no-op buffer prints

* Test vector parity (on esp32s3)

* Checkpoint for converting to alignment helper

* Finish refactoring & additional parity tests on esp32s3

* Remove core_intrinsics requirement for now

* Fix case where (src.len() % 4) == 3

* Finish sha2 example with performance comparison (12-61x speedup)

* Refactor ESP32 to alignment helper & Clean up example

* Prevent out-of-bounds reads in ESP32 version

* Revert Cargo debug changes

* Remove cargo config.toml

* Clean up example

* Remove common/rust-toolchain & ignore in future

* Might as well use actual size_of const

* Remove SHA512/SHA384 for C2/C3

* Directly import nb::block! to remove unused import warning & fix c2 feature detect

* Remove stray newlines

* Fix esp32c2 having SHA256

* ESP32 also has SHA384

* Remove comments that don't have a purpose

* Clean up example & finish() handling

* Add examples & add ESP32 free()

* Update C2/C3 examples to show accurate algorithm used

* Fix busy check for ESP32

* Remove outdated TODO comment

* Update PAC for ESP3 and (actually) fix busy check

* Refactor ESP32 version to reduce search space

* Add debug printlns to sha example & clean up comments

* Fix ESP32 version, finally

Co-authored-by: ferris <ferris@devdroplets.com>
Co-authored-by: Jesse Braham <jesse@beta7.io>
2022-11-28 14:20:31 -08:00
icedrocket
177d278223
Add more trait re-exports to prelude module (#260)
* Add more trait re-exports to prelude module

* Don't expose usb_serial_jtag module

* Add missing system module re-exports
2022-11-23 07:24:47 -08:00
bjoernQ
4afa8fda92 Preliminary I2S Implementation 2022-11-17 08:24:43 -08:00
Scott Mabin
9064177e99
Initial embassy support (#225)
* wip: timg embassy driver

- read_raw on timg renamed to now()
- timg initialized and stored in static for use in the embassy driver
- timg sets alarm value
- untested whether alarms actually trigger

* TIMG timer driver for esp32, esp32s3

- Adds the timg timer block as a time driver for embassy
- Not enabled on the C3 as it only has one timer block, better to use
  systimer
- s2 example added but can't build due to atomic requirements in
  futures-core

* Add S2 atomic support with emulation, fixup embassy support for the S2

* Move executor & static-cell to dev deps. Make eha optional

* Add c2 support, run fmt

* Update to crates.io embassy releases

* Update eha

* update timg time driver to new trait

* Remove exception feature of esp-backtrace and use the user handler for backtracing

* Add async testing workflow

* Update systick example

* Fix S2 examples

* Update xtensa-toolchain

* set rustflags for s2 target

* Disable systick for esp32s2 until we can fix the noted issues

* review improvements

- Fix intr prio array being off by one
- emabssy time prio interrupt set to max prio
- use cfg instead of feature for systick detection

* Update example time delays
2022-11-09 08:04:38 -08:00
icedrocket
b52670a3e9 doc: add #[doc(inline)] to esp-hal-common re-exports 2022-11-08 18:26:00 +09:00
bjoernQ
a876d8d344 Support USB-DEVICE on ESP32-S3 and ESP32-S2 2022-11-02 07:14:50 -07:00
Jesse Braham
c642c79297 Add DMA support for ESP32-S3 2022-10-27 12:08:23 -07:00
Juraj Sadel
d850b76246 ESP32S3: Add ADC support 2022-10-20 17:44:08 +02:00
Gustavo Henrique Nihei
a33c0de7f6 rtc: Add RWDT examples for ESP32, ESP32-S2 and ESP32-S3
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-08 13:34:22 -03:00
Gustavo Henrique Nihei
91ea205446
ESP32-C3: Add driver for RTC Watchdog Timer (RWDT) (#134)
* esp32: Fix typo in Frequency word in some identifiers

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* esp32c3: Add support for PLL clock configuration

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* clock: Move definition of Clock types to common level

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* esp32c3: Add support for RTC Clock configuration

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* esp32c3: Add example for the RTC Watchdog Timer driver

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-08 15:36:19 +01:00
bjoernQ
275cede963 Fix LEDC divider calculation, use REF_TICK when needed 2022-08-08 14:41:55 +02:00
Scott Mabin
1d02bf87c3
RISCV vectored interrupts (#118)
* RISCV interrupt vectoring

- Adds support for vectoring peripheral interrupts to PAC handlers
- Currently supports level interrupts with priorities from 1-15
- Updated the gpio interrupt example to reflect the new changes

* remove .vscode files

* Support vectored edge interrupts

This is as simple as making sure we clear the CPU interrupt whenever we
receive one. This also documents further what APIs are safe to call when
the `vectored` feature is enabled.

* fix all examples to use vectoring

* doc & cleanup

* run handlers from ram

* make xtensa::interrupt::vectored private, we rexport public items

* fix default handlers

* pass interrupt into EspDefaultHandler
2022-07-26 09:24:47 -07:00
Scott Mabin
1789780d06
Xtensa vectored interrupts (#103)
* Xtensa interrupt vectoring: peripheral source

- Initial Xtensa vectoring, updated esp32 gpio example to use new interrupt macro.
- Only peripheral sources supported.
- Only level one priority supported.
- CPU & Edge interrupts still need to be handled.

* Xtensa interrupt vectoring: CPU & EDGE

- Add support for handling CPU interrupts and edge interrupts
- PR required to xtensa-lx-rt for CPU handlers

* Xtensa interrupt vectoring: Priority

- Finally implement priortization
- Only three priorities available at the moment. Xtensa programmer guide
  discourages using highpri interrupts in Rust/C. Guide also mentions
  using software priortization to increase the number of Priorities
  available

* support CPU interrupts, using patch xtensa-lx-rt

* Update example

* Add support & examples for the s2 & s3 too

* Fix formatting and missing imports

* Run interrupt handling in ram, optionally run the vector handler in ram in the examples

* Use xtensa_lx::Mutex CS when enabling interrupts

* Run clippy on each target

* Remove redundant features

* Fix C3 builds

* make enable unsafe. Add note about preallocated interrupts in vectored mode.

* Remove `INTERRUPT_LEVELS` static

The interrupt levels static introduces a few issues
  - A lock is needed when configuring interrupts to keep
    INTERRUPT_LEVELS in a consistent state
  - Interrupts enabled from outside the Rust domain wouldn't be
    serviced, this is the case with the wifi blobs

To remove it, the prioty configuration is now calculated dynamically in
the interrupt handler. Essentially INTERRUPT_LEVELS is now created once
the interrupt triggers. It has some benefits, such as only having to
look at interrupts configured on the current core, not both, but there
is of course an overhead with doing this in the interrupt.

* Allow raw interrupts on levels 4-7, whilst also supporting vectoring on levels 1-3

* rename core number features

* Fix examples and formatting

* use xtensa-lx-rt release, update pacs

* Support passing the trap frame into interrupt handlers

* cfg away the #[interrupt] macro when not using vectoring

* rename enable to map

move vectored feature to chip specific hals

* export vectored functions

- rename `enable_with_priority` to `enable`
- add docs for interrupt macro

* Update all examples to use vectored interrupts
2022-07-25 07:12:34 -07:00
Björn Quentin
9fa1d1ecdb
Add direct-boot support for ESP32-S3 (#107)
* Add direct-boot support for ESP32-S3
* Make sure to use correct alignments
* Only enable naked_functions and asm_experimental_arch when direct-boot feature is selected
2022-07-20 07:14:19 -07:00
Björn Quentin
147d8de988
Separate TIMG into timer0, (timer1), wdt (#104)
* Separate TIMG into timer0, (timer1), wdt
* Apply suggestions from code review
* Remove left-over code
* Ignore settings.json
2022-07-20 06:51:39 -07:00
Björn Quentin
e612bd1120
Add some config options to the UART driver (#99)
* Add some config options to the UART driver
* Use esp-println 0.2.0
* Remove the NoPin type
* Serial constructor now doesn't return a Result anymore
2022-07-12 08:00:02 -07:00
bjoernQ
1655e36c31 Implement starting a task on second core of ESP32 and ESP32-S3 2022-07-05 17:41:55 +02:00
bjoernQ
8a3a0e7cb9 Reading of some eFuses 2022-06-17 16:51:26 +02:00
bjoernQ
9c244ba16c Make sure that HAL users don't need to depend on esp-hal-common 2022-06-13 16:38:58 +02:00
Scott Mabin
4acdf2516c
[esp32c3] SYSTIMER peripheral (#76)
* initial systimer impl
* Add systimer example
* Make Alarms real singletons
  * Remove runtime Option, turn into compile error
  * Make Systimer::now() not take self
* refactor shared alarm methods
* Implement esp32c3 delay with monotonic SystemTimer::now()
* Add extend systimer support to esp32s3 and add example
* systimer: esp32s2 support
2022-06-10 07:53:45 -07:00
Björn Quentin
3fd4b03144
Add boot-default ClockConfig (#77) 2022-06-09 13:51:17 +01:00
Björn Quentin
76a2067339
Add feature to reserve Bluetooth RAM for ESP32 (#63) 2022-05-20 10:38:39 +01:00
Robert Wiewel
a55c9d77ec Add RMT output channel support for all current ESP32 variants
- Add RMT output channel support for ESP32, ESP32-S2, ESP32-S3, ESP32-C3
- Add add RMT adapter for `smart-leds` crate
- Add example `hello_rgb` for ESP32-S2, ESP32-S3 and ESP32-C3 that either
  drives one LED at the pin where a LED is located on the official devkits
- Add example `hello_rgb` for ESP32 that is driving a 12-element RGB ring.
2022-05-17 15:56:25 +02:00
Jesse Braham
c0a584ecfa
Add a minimal driver for the USB_SERIAL_JTAG peripheral (#56)
* Add a minimal driver  for the USB_SERIAL_JTAG peripheral implementing core::fmt::Write
2022-05-02 03:55:36 -07:00
bjoernQ
15c34c23e4 Merge branch 'main' into feature/spi 2022-03-10 17:51:18 +01:00
Jesse Braham
bad8020abe Implement the embedded-hal Read trait for the RNG peripheral 2022-03-10 08:14:39 -08:00
bjoernQ
3f7a675b1e Implement SPI 2022-03-10 11:03:20 +01:00
bjoernQ
e34319b763 Apply more suggestions from code review 2022-03-02 09:38:06 +01:00
Robert Wiewel
f2884bd3b8 Add RWDT disable in RTC_CNTL for ESP32/S2/S3 2022-02-25 23:41:05 +01:00
bjoernQ
ab046efce3 GPIO for ESP32S3 2022-02-23 15:46:54 +00:00
bjoernQ
545f997b07 Support ESP32S3 2022-02-16 15:44:06 +00:00
Jesse Braham
9a030cbf78 Implement DelayMs and DelayUs traits from embedded-hal 2022-01-10 13:52:46 -08:00
Jesse Braham
4e9ad72839 Assorted updates to make most things build properly... still some errors 2021-11-23 20:12:34 -08:00
Jesse Braham
61e3d6ccf3 Add the (incomplete and non-buildable) esp32s2-hal and esp32s3-hal packages 2021-11-23 14:11:51 -08:00